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                >CD4029B>規(guī)格書(shū)列表
                
          
            
          
                
          
                    
          型號(hào)下載 訂購(gòu)功能描述制造商 上傳企業(yè)LOGO
          
                    
          CD4029BE.A
          絲?。?a target="_blank" title="Marking" href="/cd4029be/marking.html">CD4029BE；Package：PDIP；CMOS Presettable Up/Down Counter
          
Features:
? Medium-speed operation . . . 8 MHz (typ.)
@Cy_ = 50 pF and Vpp—Vgg = 10 V
# Multi-package parallel clocking for synchronous
high speed output response or ripple clocking
for slow clock input rise and fall times
= “Preset Enable” and individual “Jam” inputs provided
? Binary or d
          文件：1.02221 Mbytes 頁(yè)數(shù)：22 Pages
          TI
          德州儀器
          

          CD4029BF
          絲?。?a target="_blank" title="Marking" href="/cd4029bf/marking.html">CD4029BF；Package：CDIP；CMOS Presettable Up/Down Counter
          
Features:
? Medium-speed operation . . . 8 MHz (typ.)
@Cy_ = 50 pF and Vpp—Vgg = 10 V
# Multi-package parallel clocking for synchronous
high speed output response or ripple clocking
for slow clock input rise and fall times
= “Preset Enable” and individual “Jam” inputs provided
? Binary or d
          文件：1.02221 Mbytes 頁(yè)數(shù)：22 Pages
          TI
          德州儀器
          

          CD4029BF.A
          絲?。?a target="_blank" title="Marking" href="/cd4029bf/marking.html">CD4029BF；Package：CDIP；CMOS Presettable Up/Down Counter
          
Features:
? Medium-speed operation . . . 8 MHz (typ.)
@Cy_ = 50 pF and Vpp—Vgg = 10 V
# Multi-package parallel clocking for synchronous
high speed output response or ripple clocking
for slow clock input rise and fall times
= “Preset Enable” and individual “Jam” inputs provided
? Binary or d
          文件：1.02221 Mbytes 頁(yè)數(shù)：22 Pages
          TI
          德州儀器
          

          CD4029BF3A
          絲?。?a target="_blank" title="Marking" href="/8101602ea/marking.html">8101602EA；Package：CDIP；CMOS Presettable Up/Down Counter
          
Features:
? Medium-speed operation . . . 8 MHz (typ.)
@Cy_ = 50 pF and Vpp—Vgg = 10 V
# Multi-package parallel clocking for synchronous
high speed output response or ripple clocking
for slow clock input rise and fall times
= “Preset Enable” and individual “Jam” inputs provided
? Binary or d
          文件：1.02221 Mbytes 頁(yè)數(shù)：22 Pages
          TI
          德州儀器
          

          CD4029BF3A.A
          絲印：8101602EA；Package：CDIP；CMOS Presettable Up/Down Counter
          
Features:
? Medium-speed operation . . . 8 MHz (typ.)
@Cy_ = 50 pF and Vpp—Vgg = 10 V
# Multi-package parallel clocking for synchronous
high speed output response or ripple clocking
for slow clock input rise and fall times
= “Preset Enable” and individual “Jam” inputs provided
? Binary or d
          文件：1.02221 Mbytes 頁(yè)數(shù)：22 Pages
          TI
          德州儀器
          

          CD4029BM
          絲?。?a target="_blank" title="Marking" href="/cd4029bm/marking.html">CD4029BM；Package：SOIC；CMOS Presettable Up/Down Counter
          
Features:
? Medium-speed operation . . . 8 MHz (typ.)
@Cy_ = 50 pF and Vpp—Vgg = 10 V
# Multi-package parallel clocking for synchronous
high speed output response or ripple clocking
for slow clock input rise and fall times
= “Preset Enable” and individual “Jam” inputs provided
? Binary or d
          文件：1.02221 Mbytes 頁(yè)數(shù)：22 Pages
          TI
          德州儀器
          

          CD4029BM96
          絲印：CD4029BM；Package：SOIC；CMOS Presettable Up/Down Counter
          
Features:
? Medium-speed operation . . . 8 MHz (typ.)
@Cy_ = 50 pF and Vpp—Vgg = 10 V
# Multi-package parallel clocking for synchronous
high speed output response or ripple clocking
for slow clock input rise and fall times
= “Preset Enable” and individual “Jam” inputs provided
? Binary or d
          文件：1.02221 Mbytes 頁(yè)數(shù)：22 Pages
          TI
          德州儀器
          

          CD4029BM96.A
          絲?。?a target="_blank" title="Marking" href="/cd4029bm/marking.html">CD4029BM；Package：SOIC；CMOS Presettable Up/Down Counter
          
Features:
? Medium-speed operation . . . 8 MHz (typ.)
@Cy_ = 50 pF and Vpp—Vgg = 10 V
# Multi-package parallel clocking for synchronous
high speed output response or ripple clocking
for slow clock input rise and fall times
= “Preset Enable” and individual “Jam” inputs provided
? Binary or d
          文件：1.02221 Mbytes 頁(yè)數(shù)：22 Pages
          TI
          德州儀器
          

          CD4029B-MIL
          CMOS Presettable Up/Down Counter
          
Features:
? Medium-speed operation . . . 8 MHz (typ.)
@Cy_ = 50 pF and Vpp—Vgg = 10 V
# Multi-package parallel clocking for synchronous
high speed output response or ripple clocking
for slow clock input rise and fall times
= “Preset Enable” and individual “Jam” inputs provided
? Binary or d
          文件：1.02221 Mbytes 頁(yè)數(shù)：22 Pages
          TI
          德州儀器
          

          CD4029BMS
          CMOS Presettable Up/Down Counter
          
Features
? High-Voltage Type (20V Rating)
? Medium Speed Operation: 8MHz (Typ.) at CL = 50pF
and VDD - VSS = 10V
? Multi-Package Parallel Clocking for Synchronous High
Speed Output Response or Ripple Clocking for Slow
Clock Input Rise and Fall Times
? “Preset Enable” and Individual “Jam” In
          文件：436.27 Kbytes 頁(yè)數(shù)：11 Pages
          RENESAS
          瑞薩
          

          
            
          
		
        
          
            
          
                
          替換型號(hào)
          
            
          
            
            
        
          
		
        
          
            
          
                
          技術(shù)參數(shù)
          
            
          
            
            
            	
          • Bits (#)：
            4
          • Technology Family：
            CD4000
          • Supply voltage (Min) (V)：
            3
          • Supply voltage (Max) (V)：
            18
          • Input type：
            Standard CMOS
          • Output type：
            Push-Pull
          • Features：
            Balanced outputs
          
            
          
        
          
            
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          JRC/新日本無(wú)線(xiàn)
          		

          23+
          		

          SOP8
          		

          3000
          		

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          TI德州儀器
          		

          22+
          		

          		

          24000
          		

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          TI
          		

          25+
          		

          DIP
          		

          330
          		

          百分百原裝正品 真實(shí)公司現(xiàn)貨庫(kù)存 本公司只做原裝 可
          		
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          NSC
          		

          24+/25+
          		

          		

          280
          		

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          HAR
          		

          24+
          		

          DIP
          		

          5650
          		

          公司原廠原裝現(xiàn)貨假一罰十!特價(jià)出售!強(qiáng)勢(shì)庫(kù)存!
          		
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          TI
          		

          25+
          		

          標(biāo)準(zhǔn)封裝
          		

          18000
          		

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          TI
          		

          		

          DIP
          		

          1000
          		

          正品原裝--自家現(xiàn)貨-實(shí)單可談
          		
詢(xún)價(jià)
          

          



          TI
          		

          23+
          		

          		

          1000
          		

          全新原裝正品現(xiàn)貨,價(jià)優(yōu)
          		
詢(xún)價(jià)
          

          



          TI
          		

          2016+
          		

          SOP16
          		

          3000
          		

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詢(xún)價(jià)
          

          



          TI
          		

          17+
          		

          DIP
          		

          6200
          		

          100%原裝正品現(xiàn)貨
          		
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          更多CD4029B供應(yīng)商
            更新時(shí)間2026-1-19 11:09:00
        
          
        
          
          
          
            
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