CMOS Presettable Up/Down Counter

Features: ? Medium-speed operation . . . 8 MHz (typ.) @Cy_ = 50 pF and Vpp—Vgg = 10 V # Multi-package parallel clocking for synchronous high speed output response or ripple clocking for slow clock input rise and fall times = “Preset Enable” and individual “Jam” inputs provided ? Binary or d

文件：1.02221 Mbytes 頁數(shù)：22 Pages

TI

德州儀器

CMOS PRESETTABLE UP/DOWN COUNTER

文件：1.03602 Mbytes 頁數(shù)：18 Pages

TI

德州儀器

CMOS 可預(yù)置加/減計數(shù)器

CD4029B consists of a four-stage binary or BCD-decade up/down counter with provisions for look-ahead carry in both counting modes. The inputs consist of a single CLOCK, CARRY-IN\\ (CLOCK ENABLE\\), BINARY/DECADE, UP/DOWN, PRESET ENABLE, and four individual JAN signals, Q1, Q2, Q3, Q4 and a CARRY OUT ? Medium-speed operation… 8 MHz (typ.) @ CL = 50 pF and VDD–VSS = 10 V\n? \"Preset Enable\" and individual \"Jam\" inputs provided\n? BCD outputs in decade mode\n? 5-V, 10-V, and 15-V parametric ratings\n? Maximum input current of 1 μA at 18 V over full package-temperature range; 100 nA at 18 V and ;

TI

德州儀器

Presettable Binary/Decade Up/Down Counter

文件：164.2 Kbytes 頁數(shù)：8 Pages

NSC

國半

Presettable Binary/Decade Up/Down Counter

文件：164.2 Kbytes 頁數(shù)：8 Pages

NSC

國半

CMOS Presettable Up/Down Counter

Description CD4029BMS consists of a four-stage binary or BCD-decade up/down counter with provisions for look-ahead carry in both counting modes. Features ? High-Voltage Type (20V Rating) ? Medium Speed Operation: 8MHz (Typ.) at CL = 50pF and VDD - VSS = 10V ? Multi-Package Paralle

文件：124.65 Kbytes 頁數(shù)：11 Pages

INTERSIL