CMOS Presettable Up/Down Counter

Description CD4029BMS consists of a four-stage binary or BCD-decade up/down counter with provisions for look-ahead carry in both counting modes. Features ? High-Voltage Type (20V Rating) ? Medium Speed Operation: 8MHz (Typ.) at CL = 50pF and VDD - VSS = 10V ? Multi-Package Paralle

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INTERSIL

CMOS Presettable Up/Down Counter

Features ? High-Voltage Type (20V Rating) ? Medium Speed Operation: 8MHz (Typ.) at CL = 50pF and VDD - VSS = 10V ? Multi-Package Parallel Clocking for Synchronous High Speed Output Response or Ripple Clocking for Slow Clock Input Rise and Fall Times ? “Preset Enable” and Individual “Jam” In

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RENESAS

瑞薩

CMOS Presettable Up/Down Counter

CD4029BMS consists of a four-stage binary or BCD-decade up/ down counter with provisions for look-ahead carry in both counting modes. The inputs consist of a single CLOCK, CARRY-IN (CLOCK ENABLE), BINARY/DECADE, UP/DOWN, PRESET ENABLE, and four individual JAM signals. Q1, Q2, Q3, Q4 and a CARRY-OUT ? High-Voltage Type (20V Rating) \n? Medium Speed Operation: 8MHz (Typ.) at CL = 50pF and VDD - VSS = 10V \n? Multi-Package Parallel Clocking for Synchronous High Speed Output Response or Ripple Clocking for Slow Clock Input Rise and Fall Times \n? \"Preset Enable\" and Individual \"Jam\" Inputs Pro;

Renesas

瑞薩

CMOS PRESETTABLE UP/DOWN COUNTER

文件：302.49 Kbytes 頁數(shù)：7 Pages

TI

德州儀器

CMOS PRESETTABLE UP/DOWN COUNTER

文件：1.03602 Mbytes 頁數(shù)：18 Pages

TI

德州儀器

CMOS Presettable Up/Down Counter

Features: ? Medium-speed operation . . . 8 MHz (typ.) @Cy_ = 50 pF and Vpp—Vgg = 10 V # Multi-package parallel clocking for synchronous high speed output response or ripple clocking for slow clock input rise and fall times = “Preset Enable” and individual “Jam” inputs provided ? Binary or d

文件：1.02221 Mbytes 頁數(shù)：22 Pages

TI

德州儀器