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首頁 >HEF4027BD>規(guī)格書列表

型號	下載訂購	功能描述	制造商上傳企業(yè)	LOGO
HEF4027BD	文件：64.709 Kbytes Page：5 Pages	Dual JK flip-flop DESCRIPTION The HEF4027B is a dual JK flip-flop which is edge-triggered and features independent set direct (SD), clear direct (CD), clock (CP) inputs and outputs (O,O). Data is accepted when CP is LOW, and transferred to the output on the positive-going edge of the clock. The active HIGH as 文件：64.709 Kbytes 頁數(shù)：5 Pages	PHI PHI	PHI
HEF4027BDF	文件：64.709 Kbytes Page：5 Pages	Dual JK flip-flop DESCRIPTION The HEF4027B is a dual JK flip-flop which is edge-triggered and features independent set direct (SD), clear direct (CD), clock (CP) inputs and outputs (O,O). Data is accepted when CP is LOW, and transferred to the output on the positive-going edge of the clock. The active HIGH as 文件：64.709 Kbytes 頁數(shù)：5 Pages	PHI PHI	PHI
HEF4027BD	文件：300 bytes Page：1 Pages	Dual JK flip-flop DESCRIPTION\nThe HEF4027B is a dual JK flip-flop which is edge-triggered and features independent set direct\n(SD), clear direct (CD), clock (CP) inputs and outputs (O,O). Data is accepted when CP is LOW, and transferred to the output on the positive-going edge of the clock. The active HIGH asynchro	恩XP	恩XP
HEF4027BF	文件：64.709 Kbytes Page：5 Pages	Dual JK flip-flop DESCRIPTION The HEF4027B is a dual JK flip-flop which is edge-triggered and features independent set direct (SD), clear direct (CD), clock (CP) inputs and outputs (O,O). Data is accepted when CP is LOW, and transferred to the output on the positive-going edge of the clock. The active HIGH as 文件：64.709 Kbytes 頁數(shù)：5 Pages	PHI PHI	PHI
HEF4027BN	文件：64.709 Kbytes Page：5 Pages	Dual JK flip-flop DESCRIPTION The HEF4027B is a dual JK flip-flop which is edge-triggered and features independent set direct (SD), clear direct (CD), clock (CP) inputs and outputs (O,O). Data is accepted when CP is LOW, and transferred to the output on the positive-going edge of the clock. The active HIGH as 文件：64.709 Kbytes 頁數(shù)：5 Pages	PHI PHI	PHI
HEF4027BP	文件：64.709 Kbytes Page：5 Pages	Dual JK flip-flop DESCRIPTION The HEF4027B is a dual JK flip-flop which is edge-triggered and features independent set direct (SD), clear direct (CD), clock (CP) inputs and outputs (O,O). Data is accepted when CP is LOW, and transferred to the output on the positive-going edge of the clock. The active HIGH as 文件：64.709 Kbytes 頁數(shù)：5 Pages	PHI PHI	PHI

替換型號

供應商	型號	品牌	批號	封裝	庫存	備注	價格
深圳市一線半導體有限公司	HEF4027BD	PHI	24+	DIP16	42		詢價
深圳市勝彬電子有限公司	HEF4027BD	PHI	22+	CDIP	8000	原裝正品支持實單	詢價
深圳市美思瑞電子科技有限公司	HEF4027BD	HEF	22+	DIP	12245	現(xiàn)貨,原廠原裝假一罰十!	詢價
深圳市賽美科科技有限公司	HEF4027BD	原廠		NA	8650	一級代理原裝正品假一罰十價格優(yōu)勢長期供貨	詢價
深圳市賽特興科技有限公司	HEF4027BD	PHI	QQ咨詢	CDIP	826	全新原裝研究所指定供貨商	詢價
諦輝(北京/上海/青島 )電子科技有限公司	HEF4027BDB	PHI	25+	TSOP	18000	原廠直接發(fā)貨進口原裝	詢價
齊創(chuàng)科技(上海,北京,青島)有限公司	HEF4027BDB	恩XP	23+	CDIP	5000	原裝正品,假一罰十	詢價
深圳市福田區(qū)綠盛電子商行	HEF4027BP	PHI	2015+	DIP	19889	一級代理原裝現(xiàn)貨,特價熱賣!	詢價
千層芯半導體(深圳)有限公司	HEF4027BP	PHI	24+	SMD	20000	一級代理原裝現(xiàn)貨假一罰十	詢價
深圳市賽爾通科技有限公司	HEF4027BP	652	23+	06+	65480		詢價

更多HEF4027BD供應商更新時間2026-1-18 14:30:00

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