N-Channel Logic Level Enhancement Mode Field Effect Transistor

General Description These N-Channel logic level enhancement mode power field effect transistors are produced using Fairchilds proprietary, high cell density, DMOS technology. This very high density process is especially tailored to minimize on-state resistance. These devices are particularly suit

文件：414.53 Kbytes 頁數(shù)：4 Pages

FAIRCHILD

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N-Channel Logic Level Enhancement Mode Field Effect Transistor

ONSEMI

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N-Channel Logic Level Enhancement Mode Field Effect Transistor

N-Channel Logic Level Enhancement Mode Field Effect Transistor

文件：237.55 Kbytes 頁數(shù)：8 Pages

FAIRCHILD

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isc N-Channel MOSFET Transistor

FEATURES ·Drain Current –ID= 33A@ TC=25℃ ·Drain Source Voltage- : VDSS=30V(Min) ·Static Drain-Source On-Resistance : RDS(on) = 23mΩ(Max) ·100 avalanche tested ·Minimum Lot-to-Lot variations for robust device performance and reliable operation DESCRIPTION ·Designed for use in switch mod

文件：352.62 Kbytes 頁數(shù)：2 Pages

ISC

無錫固電

N-Channel Logic Level Enhancement Mode Field Effect Transistor

General Description These N-Channel logic level enhancement mode power field effect transistors are produced using Fairchilds proprietary, high cell density, DMOS technology. This very high density process is especially tailored to minimize on-state resistance. These devices are particularly suit

文件：414.53 Kbytes 頁數(shù)：4 Pages

FAIRCHILD

仙童半導體