LAN8650 & LAN8651 Single Pair Ethernet Switches

Microchip Technology LAN8650 and_LAN8651 Industrial Grade Single Pair Ethernet Switches combine a Media Access Controller (MAC) and_an Ethernet PHY. This combination enables low-cost microcontrollers, including those without an onboard MAC, to access 10BASE-T1S networks. The common standard Serial Peripheral Interface (SPI) of the LAN8650 and_LAN8651 allows interfacing with nearly any microcontroller to transfer Ethernet packets, and_LAN8650 and_LAN8651 control/status commands are performed over a single serial interface. SPI requires only four pins, enabling a more straightforward hardware interface with fewer pins than MII or RMII.

Ethernet packets are segmented and_transferred over the serial interface according to the OPEN Alliance 10BASE-T1x MAC-PHY Serial Interface specification. The serial interface protocol can simultaneously transfer transmit and_receive packets between the station controller and_the LAN8650 and_LAN8651. Packets are typically stored within the Microchip Technology LAN8650 and_LAN8651 before being forwarded to either the station microcontroller or the network. Alternatively, packets may be transferred in a cut-through mode for applications needing reduced latency.

The LAN8650 and_LAN8651 devices are equipped with Time-Sensitive Networking (TSN) support, which allows for synchronized timing across far-reaching Ethernet networks. This time synchronization is critical for many automotive applications such as Advanced Driving Assistance Systems (ADAS).

The automotive-qualified LAN8650 and_LAN8651 are compliant with the AEC-Q100 Grade 1 qualification standard for enhanced robustness in harsh environments, including extended operational temperature range from ?40oC to +125oC. _In addition, the LAN8650 and_LAN8651 are functional safety ready and_designed for use in ISO 26262 applications.
特性

_High-performance 10BASE-T1S single-pair Ethernet PHY
_Designed to IEEE Std. 802.3cg?-2019
_10Mbit/s over a single balanced pair of conductors
_Half-duplex point-to-point link segments up to at least 15m
_Half-duplex multidrop_mixing segments up to at least 25m with up to at least 8 PHYs, reducing costs for cabling and_switch ports
_Integrated Media Access Controller (MAC)
_Optional frame filtering to limit incoming packets
_Industry-standard Serial Peripheral Interface (SPI)
_Designed to the OPEN Alliance 10BASE-T1x MAC-PHY Serial Interface specification, V1.1
_Supports clock rates up to 25MHz
_Physical Layer Collision Avoidance (PLCA)
_Allows for high bandwidth utilization by avoiding collisions on the physical layer
_Burst mode for transmission of multiple packets for high packet rate latency-sensitive applications
_Carrier Sense Multiple Access / Collision Detection (CSMA/CD) media access control

_Supports time-sensitive networking by timestamping frame ingress and_egress
_EtherGREEN? Energy Efficiency
_Low power 10BASE-T1S PHY operation
_Ultra-low power sleep mode
_Wake-up triggered by either MDI activity or local WAKE_IN
_WAKE_OUT pulse assertion
_INH output for enable/disable of ECU supply
_Over-temperature and_under-voltage protection
_Comprehensive status interrupt support
_Enhanced electromagnetic compatibility / electromagnetic interference (EMC/EMI) performance
_Low RF emissions
_Robust against injected currents and_network cable shorts to ground or battery
_A simple, low-cost analog front-end
_Single 3.3V supply with integrated 1.8V regulator (LAN8651)
_Small footprint 32-pin (5mm x 5mm) VQFN package with wettable flanks
_-40°C to +125°C extended temperature range

應(yīng)用

_Sensor/actuator networks operating at high bandwidth
_Audio networks delivering multiple streams, such as hands-free microphones and_loudspeakers

_Industrial control cabinets and_machine control
_Building automation