類(lèi)型：N溝道 漏源電壓(Vdss)：100V 連續(xù)漏極電流(Id)：12.4A 功率(Pd)：2.5W 導(dǎo)通電阻(RDS(on)@Vgs,Id)：8mΩ@10V,13A N 溝道，PowerTrench MOSFET，100V，60A，8mΩ 此 N 溝道 MOSFET 是使用先進(jìn)的 PowerTrench 工藝生產(chǎn)的，特別適用于最大程度降低導(dǎo)通電阻，同時(shí)保持卓越的

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PDF上傳者：深圳市亞泰盈科電子有限公司

N-Channel PowerTrench? MOSFET 100 V, 49 A, 8 m?

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N-Channel PowerTrench? MOSFET

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N 溝道，PowerTrench? MOSFET，100V，60A，8mΩ

該N溝道MOSFET采用飛兆半導(dǎo)體先進(jìn)的Power Trench?工藝生產(chǎn)，這一先進(jìn)工藝是專(zhuān)為最大限度地降低通態(tài)電阻并保持卓越開(kāi)關(guān)性能而定制的。 ?最大值 rDS(on) = 8 mΩ（VGS = 10 V, ID = 13 A）\n?VGS = 6 V，ID = 9.5 A時(shí)，最大rDS(on) = 13.5mΩ\n?先進(jìn)的封裝技術(shù)和硅技術(shù)相結(jié)合，實(shí)現(xiàn)了低rDS(on)和高效率\n?MSL1耐用封裝設(shè)計(jì)\n?100%經(jīng)過(guò)UIL測(cè)試\n?符合RoHS標(biāo)準(zhǔn);

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N-Channel Dual CoolTM Power Trench? MOSFET 100 V, 60 A, 7.5 m廓

Dual Cool? packaging technology, provides both bottom- and top-side cooling in a PQFN package. Not only is the PQFN footprint an industry standard, it provides the designer with performance ?exibility. With enhanced dual path thermal performance and improved parasitics over its wire-bonded predece

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isc N-Channel MOSFET Transistor

DESCRIPTION ·Drain Source Voltage- : VDSS=100V(Min) ·Fast Switching Speed ·100 avalanche tested ·Minimum Lot-to-Lot variations for robust device performance and reliable operation APPLICATIONS ·Primary DC-DC MOSFET ·Secondary Synchronous Rectifier ·Load Switch

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DUAL COOL??PACKAGE POWERTRENCH? MOSFETs

Dual Cool? packaging technology, provides both bottom- and top-side cooling in a PQFN package. Not only is the PQFN footprint an industry standard, it provides the designer with performance ?exibility. With enhanced dual path thermal performance and improved parasitics over its wire-bonded predece

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N-Channel PowerTrench? MOSFET 100 V, 60 A, 8 m廓

文件：294.01 Kbytes 頁(yè)數(shù)：7 Pages

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N-Channel PowerTrench? MOSFET 100 V, 60 A, 8 m廓

文件：310.9 Kbytes 頁(yè)數(shù)：7 Pages

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N 溝道 PowerTrench? MOSFET 100V，60A，8mΩ

此N溝道MOSFET采用飛兆半導(dǎo)體先進(jìn)的Power Trench?工藝生產(chǎn)，這一先進(jìn)工藝是專(zhuān)為最大限度地降低通態(tài)電阻并保持卓越開(kāi)關(guān)性能而定制的。 ? Shielded Gate MOSFET Technology\n?VGS = 10V，ID = 13 A時(shí)，最大rDS(on) = 8mΩ\n?VGS = 6 V，ID = 9.5 A時(shí)，最大rDS(on) = 13.5mΩ\n?先進(jìn)的封裝技術(shù)和硅技術(shù)相結(jié)合，實(shí)現(xiàn)了低rDS(on)和高效率\n?MSL1耐用封裝設(shè)計(jì)\n?100%經(jīng)過(guò)UIL測(cè)試\n?100%經(jīng)過(guò)Rg測(cè)試\n?符合RoHS標(biāo)準(zhǔn);

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