CMOS Presettable Up/Down Counters

Features: Medium-speed operation fcr =8MHztyp.at10V Synchronous internal carry propagation Reset and Preset capability 100% tested for quiescent current at 20 V 5-V, 10-V, and 15-V parametric ratings & Standardized symmetrical output characteristics Maximum input current of 1 uA

文件：947.06 Kbytes 頁數(shù)：21 Pages

TI

德州儀器

CMOS Presettable Up/Down Counters

CD4510BMS Presettable BCD Up/Down Counter and the CD4516BMS Presettable Binary Up/Down counter consist of four synchronously clocked D-type flip-flops (with a gating structure to provide T-type flip-flop capability) connected as counters. These counters can be cleared by a high level on the RESET

文件：139.5 Kbytes 頁數(shù)：11 Pages

INTERSIL

絲印：CD4516B；Package：SOP；CMOS Presettable Up/Down Counters

Features: Medium-speed operation fcr =8MHztyp.at10V Synchronous internal carry propagation Reset and Preset capability 100% tested for quiescent current at 20 V 5-V, 10-V, and 15-V parametric ratings & Standardized symmetrical output characteristics Maximum input current of 1 uA

文件：947.06 Kbytes 頁數(shù)：21 Pages

TI

德州儀器

絲?。?a target="_blank" title="Marking" href="/cd4516b/marking.html">CD4516B；Package：SOP；CMOS Presettable Up/Down Counters

Features: Medium-speed operation fcr =8MHztyp.at10V Synchronous internal carry propagation Reset and Preset capability 100% tested for quiescent current at 20 V 5-V, 10-V, and 15-V parametric ratings & Standardized symmetrical output characteristics Maximum input current of 1 uA

文件：947.06 Kbytes 頁數(shù)：21 Pages

TI

德州儀器

絲?。?a target="_blank" title="Marking" href="/cm516b/marking.html">CM516B；Package：TSSOP；CMOS Presettable Up/Down Counters

Features: Medium-speed operation fcr =8MHztyp.at10V Synchronous internal carry propagation Reset and Preset capability 100% tested for quiescent current at 20 V 5-V, 10-V, and 15-V parametric ratings & Standardized symmetrical output characteristics Maximum input current of 1 uA

文件：947.06 Kbytes 頁數(shù)：21 Pages

TI

德州儀器

絲印：CM516B；Package：TSSOP；CMOS Presettable Up/Down Counters

Features: Medium-speed operation fcr =8MHztyp.at10V Synchronous internal carry propagation Reset and Preset capability 100% tested for quiescent current at 20 V 5-V, 10-V, and 15-V parametric ratings & Standardized symmetrical output characteristics Maximum input current of 1 uA

文件：947.06 Kbytes 頁數(shù)：21 Pages

TI

德州儀器

絲?。?a target="_blank" title="Marking" href="/cm516b/marking.html">CM516B；Package：TSSOP；CMOS Presettable Up/Down Counters

Features: Medium-speed operation fcr =8MHztyp.at10V Synchronous internal carry propagation Reset and Preset capability 100% tested for quiescent current at 20 V 5-V, 10-V, and 15-V parametric ratings & Standardized symmetrical output characteristics Maximum input current of 1 uA

文件：947.06 Kbytes 頁數(shù)：21 Pages

TI

德州儀器

CMOS Dual 64-Stage Static Shift Register

Description CD4517BMS dual 64-stage static shift register consists of two independent registers each having a clock, data, and write enable input and outputs accessible at taps following the 16th, 32rd, 48th, and 64th stages. These taps also serve as input points allowing data to be inputted

文件：116.61 Kbytes 頁數(shù)：9 Pages

INTERSIL

CMOS Dual 64-Stage Static Shift Register

Features: ? Low quiescent current — 10 nA/pkg (typ.) atVpp=5V ? Clock frequency 12 MHz (typ.} at Vpp=10V ? Schmitt trigger clock inputs allow operation with very slow clock rise and fall times = Capable of driving two low-power TTL loads, one low- power Schottky TTL load, or two HTL loads

文件：475.92 Kbytes 頁數(shù)：11 Pages

TI

德州儀器

絲?。?a target="_blank" title="Marking" href="/cd4517be/marking.html">CD4517BE；Package：PDIP；CMOS Dual 64-Stage Static Shift Register

Features: ? Low quiescent current — 10 nA/pkg (typ.) atVpp=5V ? Clock frequency 12 MHz (typ.} at Vpp=10V ? Schmitt trigger clock inputs allow operation with very slow clock rise and fall times = Capable of driving two low-power TTL loads, one low- power Schottky TTL load, or two HTL loads

文件：475.92 Kbytes 頁數(shù)：11 Pages

TI

德州儀器