4-Bit Latched/4-to-16 Line Decoders

General Description The CD4514BC and CD4515BC are 4-to-16 line decoders with latched inputs implemented with complementary MOS (CMOS) circuits constructed with N- and P-channel enhancement mode transistors. These circuits are prima rily used in decoding applications where low power dissipa tion

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FAIRCHILD

仙童半導(dǎo)體

CMOS 4-Bit Latch/4-to-16 Line Decoders

Description CD4514BMS and CD4515BMS consist of a 4-bit strobed latch and a 4-to-16-line decoder. The latches hold the last input data presented prior to the strobe transition from 1 to 0. Inhibit control allows all outputs to be placed at 0(CD4514BMS) or 1(CD4515BMS) regardless of the state of

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INTERSIL

CMOS 4-BIT LATCH/4-TO-16 LINE DECODERS

文件：222.79 Kbytes 頁(yè)數(shù)：12 Pages

TI

德州儀器

CMOS 4-Bit Latch/4-to-16 Line Decoders

Description\nCD4514BMS and CD4515BMS consist of a 4-bit strobed latch and a 4-to-16-line decoder. The latches hold the last input data presented prior to the strobe transition from 1 to 0. Inhibit control allows all outputs to be placed at 0(CD4514BMS) or 1(CD4515BMS) regardless of the state of the

Renesas

瑞薩

CMOS 4-BIT LATCH/4-TO-16 LINE DECODERS

TI

德州儀器

4-Bit Latched/4-to-16 Line Decoders

ONSEMI

安森美半導(dǎo)體

4-Bit Latched/4-to-16 Line Decoders

General Description The CD4514BC and CD4515BC are 4-to-16 line decoders with latched inputs implemented with complementary MOS (CMOS) circuits constructed with N- and P-channel enhancement mode transistors. These circuits are primarily used in decoding applications where low power dissipation

文件：121.64 Kbytes 頁(yè)數(shù)：8 Pages

SYC

CMOS 4-Bit Latch/4-to-16 Line Decoders

Features: ? Strobed input latch ? Inhibit contral u 100% tested for quiescent current at 20 V ? Maximum input current of 1 uA at 18 V over full package-temperature range; 100 nA at 18 V and 25°C u Noise margin (over full package temper- ature range): 1VatVpp= 5V 2VatVpp=10V 25VatVpp

文件：643.69 Kbytes 頁(yè)數(shù)：16 Pages

TI

德州儀器

4-Bit Latched/4-to-16 Line Decoders

General Description The CD4514BC and CD4515BC are 4-to-16 line decoders with latched inputs implemented with complementary MOS (CMOS) circuits constructed with N- and P-channel enhancement mode transistors. These circuits are prima rily used in decoding applications where low power dissipa tion

文件：84.97 Kbytes 頁(yè)數(shù)：8 Pages

FAIRCHILD

仙童半導(dǎo)體

4-Bit Latched/4-to-16 Line Decoders

General Description The CD4514BC and CD4515BC are 4-to-16 line decoders with latched inputs implemented with complementary MOS (CMOS) circuits constructed with N- and P-channel enhancement mode transistors. These circuits are prima rily used in decoding applications where low power dissipa tion

文件：84.97 Kbytes 頁(yè)數(shù)：8 Pages

FAIRCHILD

仙童半導(dǎo)體