絲?。?strong>74HC4094；Package：SO16；8-bit SIPO shift latch register (3-state)

Features ? High speed: fMAX = 80 MHz (typ.) at VCC = 6 V ? Low power dissipation: ICC = 4 μA (max.) at TA= 25 °C ? High noise immunity: VNIH = VNIL = 28% VCC (min.) ? Symmetrical output impedance: |IOH| = IOL = 4 mA (min.) ? Balanced propagation delays: tPLH ? tPHL ? Wide operating vo

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STMICROELECTRONICS

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絲?。?a target="_blank" title="Marking" href="/74hc4094y/marking.html">74HC4094Y；Package：SO16(automotivegrade)；8-bit SIPO shift latch register (3-state)

Features ? High speed: fMAX = 80 MHz (typ.) at VCC = 6 V ? Low power dissipation: ICC = 4 μA (max.) at TA= 25 °C ? High noise immunity: VNIH = VNIL = 28% VCC (min.) ? Symmetrical output impedance: |IOH| = IOL = 4 mA (min.) ? Balanced propagation delays: tPLH ? tPHL ? Wide operating vo

文件：482.58 Kbytes 頁數(shù)：17 Pages

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8-Bit Serial-Input Shift Register With Latched 3-State Outputs(High-Performance Silicon-Gate CMOS)

8-Bit Serial-Input Shift Register With Latched 3-State Outputs High-Performance Silicon-Gate CMOS The SL74HC4094 is identical in pinout to the LS/ALS4094. The device inputs are compatible with standard CMOS outputs; with pullup resistors, they are compatible with LS/ALSTTL outputs. This device

文件：315.91 Kbytes 頁數(shù)：7 Pages

SLS

8 BIT SIPO SHIFT LATCH REGISTER 3-STATE

DESCRIPTION The M54/74HC4094 is a high speed CMOS 8 BIT SIPOSHIFT LATCH REGISTER fabricated with silicon gate C2MOS technology. ■ HIGH SPEED fMAX = 73 MHz (TYP.) AT VCC = 5 V ■ LOW POWER DISSIPATION ICC = 4 μA (MAX.) AT TA = 25 °C ■ HIGH NOISE IMMUNITY VNIH = VNIL = 28 VCC (MIN.)

文件：270.2 Kbytes 頁數(shù)：12 Pages

STMICROELECTRONICS

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8-stage shift-and-store bus register

1. General description The 74HC4094; 74HCT4094 is an 8-bit serial-in/serial or parallel-out shift register with a storage register and 3-state outputs. Both the shift and storage register have separate clocks. The device features a serial input (D) and two serial outputs (QS1 and QS2) to enable

文件：300.2 Kbytes 頁數(shù)：19 Pages

NEXPERIA

安世

8-stage shift-and-store bus register

1. General description The 74HC4094; 74HCT4094 is an 8-bit serial-in/serial or parallel-out shift register with a storage register and 3-state outputs. Both the shift and storage register have separate clocks. The device features a serial input (D) and two serial outputs (QS1 and QS2) to enable

文件：300.2 Kbytes 頁數(shù)：19 Pages

NEXPERIA

安世

8-stage shift-and-store bus register

General description The 74HC4094; 74HCT4094 is an 8-bit serial-in/serial or parallel-out shift register with a storage register and 3-state outputs. Both the shift and storage register have separate clocks. The device features a serial input (D) and two serial outputs (QS1 and QS2) to enable casc

文件：203.79 Kbytes 頁數(shù)：23 Pages

恩XP

8-stage shift-and-store bus register

General description The 74HC4094; 74HCT4094 is an 8-bit serial-in/serial or parallel-out shift register with a storage register and 3-state outputs. Both the shift and storage register have separate clocks. The device features a serial input (D) and two serial outputs (QS1 and QS2) to enable casc

文件：203.79 Kbytes 頁數(shù)：23 Pages

恩XP

8-stage shift-and-store bus register

1. General description The 74HC4094-Q100; 74HCT4094-Q100 is an 8-bit serial-in/serial or parallel-out shift register with a storage register and 3-state outputs. Both the shift and storage register have separate clocks. The device features a serial input (D) and two serial outputs (QS1 and QS2)

文件：284 Kbytes 頁數(shù)：18 Pages

NEXPERIA

安世

8-stage shift-and-store bus register

General description The 74HC4094; 74HCT4094 is an 8-bit serial-in/serial or parallel-out shift register with a storage register and 3-state outputs. Both the shift and storage register have separate clocks. The device features a serial input (D) and two serial outputs (QS1 and QS2) to enable casc

文件：203.79 Kbytes 頁數(shù)：23 Pages

恩XP