絲?。?strong>74LS280；Package：SOP；9-BIT ODD/EVEN PARITY GENERATORS/CHECKERS

Generates Either Odd or Even Parity for Nine Data Lines Cascadable for n-Bits Can Be Used to Upgrade Existing Systems using MSI Parity Circuits Typical Data-to-Output Delay of Only 14 ns for “S280 and 33 ns for ‘LS280 Typical Power Dissipation: ‘LS280. ..80 mW ‘S280. . . 335 mW descrip

文件：895.28 Kbytes 頁數(shù)：21 Pages

TI

德州儀器

絲?。?strong>74LS280；Package：SOP；9-BIT ODD/EVEN PARITY GENERATORS/CHECKERS

Generates Either Odd or Even Parity for Nine Data Lines Cascadable for n-Bits Can Be Used to Upgrade Existing Systems using MSI Parity Circuits Typical Data-to-Output Delay of Only 14 ns for “S280 and 33 ns for ‘LS280 Typical Power Dissipation: ‘LS280. ..80 mW ‘S280. . . 335 mW descrip

文件：895.28 Kbytes 頁數(shù)：21 Pages

TI

德州儀器

LOW POWER SCHOTTKY

The SN74LS280 is a Universal 9-Bit Parity Generator/Checker. It features odd/even outputs to facilitate either odd or even parity. By cascading, the word length is easily expanded. The LS280 is designed without the expander input implementation, but the corresponding function is provided by an inp

文件：106.51 Kbytes 頁數(shù)：4 Pages

ONSEMI

安森美半導(dǎo)體

9-bit Odd/Even Parity Generators/Checkers

9-bit Odd/Even Parity Generators/Checkers This parity generator/checker offers the designer a trade-off between reduce power consumption and high performance. Although the HD74LS280 is implemented without expander inputs, the corresponding function is provided by the availability of an input at p

文件：58.29 Kbytes 頁數(shù)：6 Pages

HITACHIHitachi Semiconductor

日立日立公司

9-BIT ODD/EVEN PARITY GENERATORS/CHECKERS

文件：227.77 Kbytes 頁數(shù)：6 Pages

TI

德州儀器