8-stage shift-and-store bus register

General description The 74HC4094; 74HCT4094 is an 8-bit serial-in/serial or parallel-out shift register with a storage register and 3-state outputs. Both the shift and storage register have separate clocks. The device features a serial input (D) and two serial outputs (QS1 and QS2) to enable casc

文件：203.79 Kbytes 頁數(shù)：23 Pages

恩XP

8-stage shift-and-store bus register

1. General description The 74HC4094; 74HCT4094 is an 8-bit serial-in/serial or parallel-out shift register with a storage register and 3-state outputs. Both the shift and storage register have separate clocks. The device features a serial input (D) and two serial outputs (QS1 and QS2) to enable

文件：300.2 Kbytes 頁數(shù)：19 Pages

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8-stage shift-and-store bus register

文件：72.54 Kbytes 頁數(shù)：10 Pages

PHI

PHI

8-stage shift-and-store bus register

General description The 74HC4094; 74HCT4094 is an 8-bit serial-in/serial or parallel-out shift register with a storage register and 3-state outputs. Both the shift and storage register have separate clocks. The device features a serial input (D) and two serial outputs (QS1 and QS2) to enable casc

文件：203.79 Kbytes 頁數(shù)：23 Pages

恩XP

8-stage shift-and-store bus register

1. General description The 74HC4094-Q100; 74HCT4094-Q100 is an 8-bit serial-in/serial or parallel-out shift register with a storage register and 3-state outputs. Both the shift and storage register have separate clocks. The device features a serial input (D) and two serial outputs (QS1 and QS2)

文件：284 Kbytes 頁數(shù)：18 Pages

NEXPERIA

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8-stage shift-and-store bus register

文件：288.43 Kbytes 頁數(shù)：19 Pages

NEXPERIA

安世

8-stage shift-and-store bus register

文件：288.43 Kbytes 頁數(shù)：19 Pages

NEXPERIA

安世

8-stage shift-and-store bus register

The 74HC4094; 74HCT4094 is an 8-bit serial-in/serial or parallel-out shift register with a storage register and 3-state outputs. Both the shift and storage register have separate clocks. The device features a serial input (D) and two serial outputs (QS1 and QS2) to enable cascading. Data is shifted ? Complies with JEDEC standard JESD7A\n? Input levels:? For 74HC4094: CMOS level\n? For 74HCT4094: TTL level\n\n? Low-power dissipation\n? ESD protection:? HBM JESD22-A114F exceeds 2000 V\n? MM JESD22-A115-A exceeds 200 V\n\n? Specified from -40 ℃ to +85 ℃ and from -40 ℃ to +125 ℃;

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74HC4094DB-Q100 - 8-stage shift-and-store bus register

8-stage shift-and-store bus register - The 74HC4094-Q100; 74HCT4094-Q100 is an 8-bit serial-in/serial or parallel-out shift register with a storage register and 3-state outputs. Both the shift and storage register have separate clocks. The device features a serial input (D) and two serial outputs (Q ·Automotive product qualification in accordance with AEC-Q100 (Grade 1)·Specified from -40 °C to +85 °C and from -40 °C to +125 °C;

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8-stage shift-and-store bus register

The 74HC4094-Q100; 74HCT4094-Q100 is an 8-bit serial-in/serial or parallel-out shift register with a storage register and 3-state outputs. Both the shift and storage register have separate clocks. The device features a serial input (D) and two serial outputs (QS1 and QS2) to enable cascading. Data i ? Automotive product qualification in accordance with AEC-Q100 (Grade 1)? Specified from -40 °C to +85 °C and from -40 °C to +125 °C\n\n? Complies with JEDEC standard JESD7A\n? Input levels:? For 74HC4094-Q100: CMOS level\n? For 74HCT4094-Q100: TTL level\n\n? Low-power dissipation\n? ESD protection:;

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安世