LOW POWER SINGLE CMOS TIMERS

DESCRIPTION The TS555 is a single CMOS timer which offers very low consumption (Icc(TYP) TS555 = 100μA Icc(TYP) NE555 = 3mA) and high frequency (f(max.) TS555 = 2.7MHz - f(max.) NE555 = 0.1 MHz) Thus, either in Monostable or Astable mode, timing remains very accurate. The TS555provides reduced s

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STMICROELECTRONICS

意法半導體

Low power single CMOS timer

Description The TS555 is a single CMOS timer with a very low consumption: (Icc(TYP) TS555 = 110 μA at VCC = +5 V versus Icc(TYP)NE555 = 3 mA), and high frequency: (ff(max.) TS555 = 2.7 MHz versus f(max) NE555 = 0.1 MHz). Timing remains accurate in both monostable and astable mode. The TS555

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STMICROELECTRONICS

意法半導體

Current Regulator Diode

Features ? InterFET N0016H Geometry ? Low Noise: 5 nV/√Hz Typical ? Low Capacitance: 2pF Typical ? RoHS Compliant ? SMT, TH, and Bare Die Package options. Applications ? Current Regulation ? Current Limiting ? Biasing Description The 50V InterFET U553, U554, and U555 JFET’s are tar

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INTERFET

SINGLE TIMING CIRCUIT

GENERAL DESCRIPTION - The I'A555 Timing Circuit is a very stable controller for producing accurate time delays or oscillations. In the time delay mode, the delay time is precisely controlled by one external resistor and one capacitor; in the oscillator mode, the frequency and duty cycle are both

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FAIRCHILD

仙童半導體

SINGLE TIMING CIRCUIT

GENERAL DESCRIPTION - The I'A555 Timing Circuit is a very stable controller for producing accurate time delays or oscillations. In the time delay mode, the delay time is precisely controlled by one external resistor and one capacitor; in the oscillator mode, the frequency and duty cycle are both

文件：270.82 Kbytes 頁數(shù)：5 Pages

FAIRCHILD

仙童半導體