STGAP2S

Features ? High voltage rail up to 1700 V ? Driver current capability: 4 A sink/source @25°C ? dV/dt transient immunity ±100 V/ns in full temperature range ? Overall input-output propagation delay: 75 ns ? Separate sink and source option for easy gate driving configuration ? 4 A Miller CLAMP

文件：459.92 Kbytes 頁數(shù)：23 Pages

STMICROELECTRONICS

意法半導體

STGAP2S

Features ? High voltage rail up to 1700 V ? Driver current capability: 4 A sink/source @25°C ? dV/dt transient immunity ±100 V/ns in full temperature range ? Overall input-output propagation delay: 75 ns ? Separate sink and source option for easy gate driving configuration ? 4 A Miller CLAMP

文件：459.92 Kbytes 頁數(shù)：23 Pages

STMICROELECTRONICS

意法半導體

STGAP2S

Features ? High voltage rail up to 1700 V ? Driver current capability: 4 A sink/source @25°C ? dV/dt transient immunity ±100 V/ns in full temperature range ? Overall input-output propagation delay: 75 ns ? Separate sink and source option for easy gate driving configuration ? 4 A Miller CLAMP

文件：459.92 Kbytes 頁數(shù)：23 Pages

STMICROELECTRONICS

意法半導體

Galvanically isolated 4 A single gate driver for SiC MOSFETs

Features ? High voltage rail up to 1200 V ? Driver current capability: 4 A sink/source @25°C ? dV/dt transient immunity ±100 V/ns in full temperature range ? Overall input-output propagation delay: 75 ns ? Separate sink and source option for easy gate driving configuration ? 4 A Miller CLAMP

文件：716.81 Kbytes 頁數(shù)：22 Pages

STMICROELECTRONICS

意法半導體

Galvanically isolated 4 A single gate driver for SiC MOSFETs

Features ? High voltage rail up to 1200 V ? Driver current capability: 4 A sink/source @25°C ? dV/dt transient immunity ±100 V/ns in full temperature range ? Overall input-output propagation delay: 75 ns ? Separate sink and source option for easy gate driving configuration ? 4 A Miller CLAMP

文件：716.81 Kbytes 頁數(shù)：22 Pages

STMICROELECTRONICS

意法半導體

STGAP2S

Features ? High voltage rail up to 1700 V ? Driver current capability: 4 A sink/source @25°C ? dV/dt transient immunity ±100 V/ns in full temperature range ? Overall input-output propagation delay: 75 ns ? Separate sink and source option for easy gate driving configuration ? 4 A Miller CLAMP

文件：459.92 Kbytes 頁數(shù)：23 Pages

STMICROELECTRONICS

意法半導體

STGAP2S

Features ? High voltage rail up to 1700 V ? Driver current capability: 4 A sink/source @25°C ? dV/dt transient immunity ±100 V/ns in full temperature range ? Overall input-output propagation delay: 75 ns ? Separate sink and source option for easy gate driving configuration ? 4 A Miller CLAMP

文件：459.92 Kbytes 頁數(shù)：23 Pages

STMICROELECTRONICS

意法半導體

電流隔離4 A單重柵極驅動器

STGAP2S是單柵極驅動器，可將柵極驅動通道與低壓控制和接口電路部分隔離。\n\n 柵極驅動器具有4A電流驅動和軌到軌輸出，使該器件適用于大功率逆變器應用，如工業(yè)應用中的電機驅動器。\n\n 該設備有兩種不同的配置。具有獨立輸出引腳的配置可以使用柵極電阻獨立優(yōu)化導通和關斷。具有單輸出引腳和米勒鉗位功能的配置可防止半橋拓撲中快速換向期間的柵極峰值。\n\n 兩種配置均可為外部組件提供高度靈活性和減少外部材料清單。\n\n 該器件集成了保護功能：包括UVLO和熱關斷功能，可輕松設計高可靠性系統(tǒng)。雙輸入引腳允許選擇控制信號極性并實現(xiàn)硬件互鎖保護，避免主控制器故障時發(fā)生傳導。\n\n 輸入到輸出的傳 ? 1700V單通道柵極驅動器 \n? 驅動器電流能力：4 A，溫度為25°C \n? dV/ dt瞬態(tài)抗擾度±100 V / ns \n? 總輸入 - 輸出傳播延遲：80 ns \n? 獨立的輸出狀態(tài)，便于柵極驅動配置 \n? 4A專用密勒鉗位引腳? UVLO功能 \n? 柵極驅動電壓高達26 V \n? 具有遲滯的3.3 V，5 V TTL / CMOS輸入 \n? 溫度關閉保護 \n? 待機功能;

ST

意法半導體

Galvanically isolated 4 A single gate driver for SiC MOSFETs

The STGAP2SICS is a single gate driver which provides galvanic isolation between the gate driving channel and the low voltage control and interface circuitry.\n\n The gate driver is characterized by 4 A capability and rail-to-rail outputs, making the device also suitable for mid and high power appli ? High voltage rail up to 1200 V \n? Driver current capability: 4 A sink/source @25°C \n? dV/dt transient immunity ±100 V/ns in full temperature range \n? Overall input-output propagation delay: 75 ns \n? Separate sink and source option for easy gate driving configuration \n? 4 A Miller CLAMP dedica;

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意法半導體

Galvanically isolated 4 A single gate driver for SiC MOSFETs

The STGAP2SICSA is a single gate driver which provides galvanic isolation between the gate driving channel and the low voltage control and interface circuitry.\n\n The gate driver is characterized by 4 A capability and rail-to-rail outputs, making the device also suitable for mid and high power appl ? AEC-Q100 qualified \n? High voltage rail up to 1200 V \n? Driver current capability: 4 A sink/source @25°C \n? 100 V/ns Common Mode Transient Immunity (CMTI) \n? Overall input-output propagation delay: 45 ns \n? Rail-to-rail outputs \n? 4 A Miller CLAMP dedicated pin \n? UVLO function? Gate drivin;

ST

意法半導體