QUADRUPLE 2-INPUT POSITIVE-NAND BUFFERS

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TI

德州儀器

4 通道、2 輸入、4.75V 至 5.25V 雙極與非門

These devices contain four independent 2-input NAND buffer gates. The SN5437, SN54LS37 and SN54S37 are characterized for operation over the full military range of -55°C to 125°C. The SN7437, SN74LS37 and SN74S37 are characterized for operation from 0°C to 70°C. ? ? Package Options Include Plastic “Small Outline\" Packages, Ceramic Chip Carriers and Flat Packages, and Plastic and Ceramic DIPs\n? Dependable Texas Instruments Quality and Reliability;

TI

德州儀器

OCTAL D-TYPE TRANSPARENT LATCHES AND EDGE-TRIGGERED FLIP-FLOPS

Choice of Eight Latches or Eight D-Type Flip-Flops in a Single Package 3-State Bus-Driving Outputs Full Parallel Access for Loading Buffered Control Inputs Clock-Enable Input Has Hysteresis to Improve Noise Rejection (’S373 and ’S374) P-N-P Inputs Reduce DC Loading on Data Lines (’S373 and

文件：1.58154 Mbytes 頁數(shù)：32 Pages

TI

德州儀器

Octal Transparent Latch with 3-State Outputs Octal D-Type Flip-Flop with 3-State Output

Octal Transparent Latch with 3-State Outputs; Octal D-Type Flip-Flop with 3-State Output The SN74LS373 consists of eight latches with 3-state outputs for bus organized system applications. The flip-flops appear transparent to the data (data changes asynchronously) when Latch Enable (LE) is

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ONSEMI

安森美半導體

Octal Transparent Latch with 3-State Outputs Octal D-Type Flip-Flop with 3-State Output

Octal Transparent Latch with 3-State Outputs; Octal D-Type Flip-Flop with 3-State Output The SN74LS373 consists of eight latches with 3-state outputs for bus organized system applications. The flip-flops appear transparent to the data (data changes asynchronously) when Latch Enable (LE) is

文件：98.85 Kbytes 頁數(shù)：8 Pages

ONSEMI

安森美半導體

絲?。?a target="_blank" title="Marking" href="/ls373/marking.html">LS373；Package：SOIC；OCTAL D-TYPE TRANSPARENT LATCHES AND EDGE-TRIGGERED FLIP-FLOPS

Choice of Eight Latches or Eight D-Type Flip-Flops in a Single Package 3-State Bus-Driving Outputs Full Parallel Access for Loading Buffered Control Inputs Clock-Enable Input Has Hysteresis to Improve Noise Rejection (’S373 and ’S374) P-N-P Inputs Reduce DC Loading on Data Lines (’S373 and

文件：1.58154 Mbytes 頁數(shù)：32 Pages

TI

德州儀器

OCTAL TRANSPARENT LATCH WITH 3-STATE OUTPUTS; OCTAL D-TYPE FLIP-FLOP WITH 3-STATE OUTPUT

OCTAL TRANSPARENT LATCH WITH 3-STATE OUTPUTS; OCTAL D-TYPE FLIP-FLOP WITH 3-STATE OUTPUT The SN54 /74LS373 consists of eight latches with 3-state outputs for bus organized system applications. The flip-flops appear transparent to the data (datachanges asynchronously) when Latch Enable (LE)

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MOTOROLA

摩托羅拉

絲?。?a target="_blank" title="Marking" href="/ls373/marking.html">LS373；Package：SOIC；OCTAL D-TYPE TRANSPARENT LATCHES AND EDGE-TRIGGERED FLIP-FLOPS

Choice of Eight Latches or Eight D-Type Flip-Flops in a Single Package 3-State Bus-Driving Outputs Full Parallel Access for Loading Buffered Control Inputs Clock-Enable Input Has Hysteresis to Improve Noise Rejection (’S373 and ’S374) P-N-P Inputs Reduce DC Loading on Data Lines (’S373 and

文件：1.58154 Mbytes 頁數(shù)：32 Pages

TI

德州儀器

Octal Transparent Latch with 3-State Outputs Octal D-Type Flip-Flop with 3-State Output

Octal Transparent Latch with 3-State Outputs; Octal D-Type Flip-Flop with 3-State Output The SN74LS373 consists of eight latches with 3-state outputs for bus organized system applications. The flip-flops appear transparent to the data (data changes asynchronously) when Latch Enable (LE) is

文件：98.85 Kbytes 頁數(shù)：8 Pages

ONSEMI

安森美半導體

Octal Transparent Latch with 3-State Outputs Octal D-Type Flip-Flop with 3-State Output

Octal Transparent Latch with 3-State Outputs; Octal D-Type Flip-Flop with 3-State Output The SN74LS373 consists of eight latches with 3-state outputs for bus organized system applications. The flip-flops appear transparent to the data (data changes asynchronously) when Latch Enable (LE) is

文件：98.85 Kbytes 頁數(shù)：8 Pages

ONSEMI

安森美半導體