Dual N-Channel , Digital FET

General Description These dual N-Channel logic level enhancement mode field effect transistors are produced using Fairchild s proprietary, high cell density, DMOS technology. This very high density process is especially tailored to minimize on-state resistance. This device has been designed espec

文件：73.93 Kbytes 頁數(shù)：4 Pages

FAIRCHILD

仙童半導(dǎo)體

Dual N-Channel , Digital FET

XW

芯微半導(dǎo)體

Dual N-Channel , Digital FET

ONSEMI

安森美半導(dǎo)體

絲?。?a target="_blank" title="Marking" href="/301/marking.html">301；Package：SOT-26；Dual N-Channel , Digital FET

General Description These dual N-Channel logic level enhancement mode field effect transistors are produced using Fairchild s proprietary, high cell density, DMOS technology. This very high density process is especially tailored to minimize on-state resistance. This device has been designed espec

文件：73.93 Kbytes 頁數(shù)：4 Pages

FAIRCHILD

仙童半導(dǎo)體

絲?。?a target="_blank" title="Marking" href="/301/marking.html">301；Package：SOT-26；Dual N-Channel , Digital FET

文件：374.3 Kbytes 頁數(shù)：5 Pages

FAIRCHILD

仙童半導(dǎo)體

Dual N-Channel , Digital FET

文件：374.3 Kbytes 頁數(shù)：5 Pages

FAIRCHILD

仙童半導(dǎo)體

絲?。?a target="_blank" title="Marking" href="/301p/marking.html">301P；Package：SOT23-6；Dual N-Channel Enhancement Mode MOSFET

文件：870.8 Kbytes 頁數(shù)：3 Pages

TECHPUBLIC

臺舟電子

雙 N 溝道，數(shù)字 FET，25V，0.22A，4Ω

這些雙N溝道邏輯電平增強(qiáng)模式場效應(yīng)晶體管采用飛兆半導(dǎo)體專有的高電池密度DMOS技術(shù)生產(chǎn)。 這種密度非常高的工藝是專為最大限度地降低導(dǎo)通阻抗而定制的。 該器件特別為低電壓應(yīng)用設(shè)計(jì)，以替代數(shù)字晶體管。 由于不要求偏壓電阻，此類N溝道FET能替代多種具有不同偏壓電阻的數(shù)字晶體管。 ?25V、0.22A（連續(xù)值）、0.5A（峰值） \n?RDS(ON) = 5 Ω @ VGS= 2.7 V\n?RDS(ON) = 4 Ω @ VGS= 4.5 V\n?柵極驅(qū)動(dòng)電平要求極低，從而可在3V電路中直接運(yùn)行。 VGS(th) < 1.5V\n?柵-源齊納二極管增強(qiáng)耐靜電放電(ESD)能力。 >6kV人體模型;

ONSEMI

安森美半導(dǎo)體