Dual P-Channel Enhancement Mode MOSFET

FEATURES ■ -30V, -4A, RDS(ON) = 65m? @VGS = -10V. RDS(ON) = 100m? @VGS = -4.5V. ■ Super high dense cell design for extremely low RDS(ON). ■ High power and current handing capability. ■ Surface mount Package.

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CET

華瑞

Dual P-Channel Enhancement Mode MOSFET

CET

華瑞

Dual P-Channel Enhancement Mode Field Effect Transistor

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FAIRCHILD

仙童半導(dǎo)體

Dual P-Channel Enhancement Mode Field Effect Transistor

General Description These P-Channel enhancement mode power field effect transistors are produced using Fairchilds proprietary, high cell density, DMOS technology. This very high density process is especially tailored to minimize on-state resistance and provide superior switching performance. Thes

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FAIRCHILD

仙童半導(dǎo)體

Isolated Delta-Sigma Modulator for Current Shunt Measurement

KEY FEATURES ? Low voltage differential input ? ±62.5 mV and ±250 mV options ? Modulator clock options ? External clock up to 25 MHz (Si8941) ? 10 MHz internal clock (Si8946) ? 20 MHz internal clock (Si8947) ? Typical input offset: ±50 μV ? Typical gain error: ±0.05 ? Excellent drift spe

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SKYWORKS

思佳訊