Dual 4-Bit Static Shift Register

General Description The CD4015BC contains two identical, 4-stage, serial input/parallel-output registers with independent “Data”, “Clock,” and “Reset” inputs. The logic level present at the input of each stage is transferred to the output of that stage at each positive-going clock transition. A

文件：56.38 Kbytes 頁數(shù)：6 Pages

FAIRCHILD

仙童半導(dǎo)體

CMOS Dual 4-Stage Static Shift Register With Serial Input/Parallel Output

Intersil’s Satellite Applications Flow? (SAF) devices are fully tested and guaranteed to 100kRAD total dose. These QML Class T devices are processed to a standard flow intended to meet the cost and shorter lead-time needs of large volume satellite manufacturers, while maintaining a high level of r

文件：74.24 Kbytes 頁數(shù)：3 Pages

INTERSIL

CMOS Dual 4-Stage Static Shift Register With Serial Input/Parallel Output

Description CD4015BMS consists of two identical, independent, 4-stage serial-input/parallel output registers. Each register has independent CLOCK and RESET inputs as well as a single serial DATA input. “Q” outputs are available from each of the four stages on both registers. All register stages

文件：118.72 Kbytes 頁數(shù)：8 Pages

INTERSIL

SEMICONDUCTORS

文件：2.43533 Mbytes 頁數(shù)：31 Pages

ETCList of Unclassifed Manufacturers

未分類制造商

Dual 4-Bit Static Shift Register

文件：134.32 Kbytes 頁數(shù)：6 Pages

NSC

國半

CMOS Dual 4-Stage Static Shift Register With Serial Input/Parallel Output

Description\nCD4015BMS consists of two identical, independent, 4-stage serial-input/parallel output registers. Each register has independent CLOCK and RESET inputs as well as a single serial DATA input. “Q” outputs are available from each of the four stages on both registers. All register stages are ? High-Voltage Type (20V Rating)\n? Medium Speed Operation 12MHz (typ.) Clock Rate at VDD - VSS = 10V\n? Fully Static Operation\n? 8 Master-Slave Flip-Flops Plus Input and Output Buffering\n? 100% Tested For Quiescent Current at 20V\n? 5V, 10V and 15V Parametric Ratings\n? Standardized Symmetric;

Renesas

瑞薩

4路移位寄存器

The CD4015 is a dual edge-triggered 4-bit static shift register (serial-to-parallel converter). ? Supply voltage range:3V to 15V \n? Temperature range:-40℃ to +125℃\n? Packaging information: DIP16/SOP16/TSSOP16;

I-CORE

中微愛芯

Dual 4-Bit Static Shift Register

General Description\nThe CD4015BM/CD4015BC contains two identical, 4-stage, serial-input/parallel-output registers with independent ``Data'', ``Clock,'' and ``Reset'' inputs. The logic level present at the input of each stage is transferred to the output of that stage at each positive-going clock tr Wide supply voltage range 3.0V to 18V\nHigh noise immunity 0.45 VDD(typ.)\nLow power TTL Fan out of 2 driving 74L\n? compatibility or 1 driving 74LS\nMedium speed operation 8 MHz (typ.) clock rate\nFully static design @VDD - VSS = 10V;

TI

德州儀器

CMOS Dual 4-Stage Static Shift Register

Features: & Medium speed operation ............. 12 MHz (typ.) clock rate at Vpp — Vg = 10 V ? Fully static operation 8 master-slave flip-flops plus input and output buffering # 100% tested for quiescent current at 20 V #5.V,10-V, and 15-V parametric ratings = Standardized, symmetrical

文件：686.94 Kbytes 頁數(shù)：16 Pages

TI

德州儀器

CMOS Dual 4-Stage Static Shift Register

Features: ? Medium speed operation . ............ 12 MHz (typ.) clock rate at Vpp — Vgg = 10 V ? Fully static operation ? 8 master-slave flip-flops plus input and output buffering ? 100% tested for quiescent current at 20 V ?5.V, 10-V, and 15-V parametric ratings ? Standardized, symmetr

文件：688.43 Kbytes 頁數(shù)：16 Pages

TI

德州儀器