Low Skew, 1-to-12 (IDCS) LVCMOS/LVTTL Clock Generator

General Description The 879893 is a PLL clock driver designed specifically for redundant clock tree designs. The device receives two LVCMOS/LVTTL clock signals from which it generates 12 new LVCMOS/LVTTL clock outputs. External PLL feedback is used to also provide zero delay buffer performance

文件：398.42 Kbytes 頁(yè)數(shù)：17 Pages

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Low Skew, 1-to-12 (IDCS) LVCMOS/LVTTL Clock Generator

文件：205.2 Kbytes 頁(yè)數(shù)：16 Pages

IDT

Low Skew, 1-to-12 (IDCS) LVCMOS/LVTTL Clock Generator

Renesas

瑞薩

Low Skew, 1-to-12 (IDCS) LVCMOS/LVTTL Clock Generator

文件：205.2 Kbytes 頁(yè)數(shù)：16 Pages

IDT

Low Skew, 1-to-12 (IDCS) LVCMOS/LVTTL Clock Generator

文件：205.2 Kbytes 頁(yè)數(shù)：16 Pages

IDT

1:12 LVCMOS Dynamic Clock Switch/Generator

The 879893I is a PLL clock driver designed specifically for redundant clock tree designs. The device receives two LVCMOS/LVTTL clock signals from which it generates 12 new LVCMOS/LVTTL clock outputs. External PLL feedback is used to also provide zero delay buffer performance. The 879893I Intelligent Twelve LVCMOS/LVTTL outputs (two banks of six outputs)\nOne QFB feedback clock output\nSelectable CLK0 or CLK1 LVCMOS/LVTTL clock inputs\nCLK0, CLK1 supports the following input types:\nLVCMOS, LVTTL\nAutomatically detects clock failure\nIDCS on-chip intelligent dynamic clock switch\nMaximum output ;

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Package：48-LQFP；包裝：卷帶（TR） 類(lèi)別：集成電路（IC） 時(shí)鐘發(fā)生器，PLL，頻率合成器 描述：IC CLK GEN LVCMOS/LVTTL 48-LQFP

Renesas Electronics America Inc

Package：48-LQFP；包裝：卷帶（TR） 類(lèi)別：集成電路（IC） 時(shí)鐘發(fā)生器，PLL，頻率合成器 描述：IC CLK GEN LVCMOS/LVTTL 48-LQFP

Renesas Electronics America Inc