MALE/FEMALE THREADED STANDOFFS

[KEYSTONE] MALE/FEMALE THREADED STANDOFFS PC 104 MOUNTING KITS NYLON STANDOFFS

文件：311.06 Kbytes 頁數(shù)：1 Pages

ETCList of Unclassifed Manufacturers

未分類制造商

MALE/FEMALE THREADED STANDOFFS

文件：310.8 Kbytes 頁數(shù)：1 Pages

KEYSTONE

Keystone Electronics Corp.

包裝：散裝 類別：五金件，緊固件，配件 板墊片，支座 描述：HEX STANDOFF #4-40 BRASS 15.24MM

Keystone Electronics

絲?。?a target="_blank" title="Marking" href="/ics87993ailf/marking.html">ICS87993AILF；Package：LQFP；1-to-5 Differential-to-3.3V LVPECL PLL Clock Driver W/Dynamic Clock Switch

FEATURES ? Five differential 3.3V LVPECL outputs ? Selectable differential clock inputs ? CLKx, nCLKx pair can accept the following differential input levels: LVPECL, LVDS, LVHSTL, HCSL, SSTL ? Output frequency range: 50MHz to 250MHz ? VCO range: 200MHz to 500MHz ? External feedback for “ze

文件：427.5 Kbytes 頁數(shù)：18 Pages

RENESAS

瑞薩

絲?。?a target="_blank" title="Marking" href="/ics87993ailf/marking.html">ICS87993AILF；Package：LQFP；1-to-5 Differential-to-3.3V LVPECL PLL Clock Driver W/Dynamic Clock Switch

FEATURES ? Five differential 3.3V LVPECL outputs ? Selectable differential clock inputs ? CLKx, nCLKx pair can accept the following differential input levels: LVPECL, LVDS, LVHSTL, HCSL, SSTL ? Output frequency range: 50MHz to 250MHz ? VCO range: 200MHz to 500MHz ? External feedback for “ze

文件：427.5 Kbytes 頁數(shù)：18 Pages

RENESAS

瑞薩

1-to-5 Differential-to-3.3V LVPECL PLL Clock Driver W/Dynamic Clock Switch

FEATURES ? Five differential 3.3V LVPECL outputs ? Selectable differential clock inputs ? CLKx, nCLKx pair can accept the following differential input levels: LVPECL, LVDS, LVHSTL, HCSL, SSTL ? Output frequency range: 50MHz to 250MHz ? VCO range: 200MHz to 500MHz ? External feedback for “ze

文件：427.5 Kbytes 頁數(shù)：18 Pages

RENESAS

瑞薩

HEX MALE/FEMALE STANDOFFS

[KEYSTONE] MALE/FEMALE THREADED STANDOFFS PC 104 MOUNTING KITS NYLON STANDOFFS

文件：110.95 Kbytes 頁數(shù)：2 Pages

ETCList of Unclassifed Manufacturers

未分類制造商

1-to-5 Differential-to-3.3V LVPECL PLL Clock Driver W/Dynamic Clock Switch

The 87993I is a PLL clock driver designed specifically for redundant clock tree designs. The device receives two differential LVPECL clock signals from which it generates 5 new differential LVPECL clock outputs. Two of the output pairs regenerate the input signal frequency and phase while the other ·5 differential 3.3V LVPECL outputs\n·Selectable differential clock inputs\n·CLKx, nCLKx pair can accept the following differential input levels: LVPECL, LVDS, LVHSTL, HCSL, SSTL\n·Output frequency range: 50MHz to 250MHz\n·VCO range: 200MHz to 500MHz\n·External feedback for \"zero delay\" clock rege;

Renesas

瑞薩

功率繼電器

Weidmueller

魏德米勒

排母

TE

泰科