Triple 3-Input NAND Gate

General Description This device contains three independent gates each of which performs the logic NAND function.

文件：46.16 Kbytes 頁數(shù)：4 Pages

FAIRCHILD

仙童半導(dǎo)體

TRIPLE 3-INPUT NAND GATE

TRIPLE 3-INPUT NAND GATE LOW POWER SCHOTTKY

文件：33.85 Kbytes 頁數(shù)：2 Pages

ONSEMI

安森美半導(dǎo)體

Triple 3-Input NAND Gate

General Description This device contains three independent gates each of which performs the logic NAND function.

文件：93.46 Kbytes 頁數(shù)：4 Pages

SYC

TRIPLE 3-INPUT NAND GATE

ONSEMI

安森美半導(dǎo)體

DUAL J-K POSITIVE-EDGE-TRIGGERED FLIP-FLOPS WITH PRESET AND CLEAR

Package Options Include Plastic Small Outline Packages, Ceramic Chip Carriers and Flat Packages, and Plastic and Ceramic DIPs Depondable Texas Instruments Quality and Reliability

文件：409.11 Kbytes 頁數(shù)：12 Pages

TI

德州儀器

LOW POWER SCHOTTKY

LOW POWER SCHOTTKY The SN74LS109A consists of two high speed completely independent transition clocked JKflip-flops.

文件：96.07 Kbytes 頁數(shù)：4 Pages

ONSEMI

安森美半導(dǎo)體

Dual Negative-Edge- Triggered Master-Slave J-K Flip-Flops with Clear and Complementary Outputs

文件：119.69 Kbytes 頁數(shù)：6 Pages

NSC

國半

絲?。?a target="_blank" title="Marking" href="/74ls107a/marking.html">74LS107A；Package：SOP；DUAL J-K FLIP-FLOPS WITH CLEAR

Package Options Include Plastic ‘*Small Outline’* Packages, Ceramic Chip Carriers, and Plastic and Ceramic DIPs Dependable Texas Instruments Quality and Reliability description The 107 contain two independent JK flip-flops with individual JK, clock, and direct clear inputs. The ‘107 is

文件：827.19 Kbytes 頁數(shù)：19 Pages

TI

德州儀器

絲印：74LS107A；Package：SOP；DUAL J-K FLIP-FLOPS WITH CLEAR

Package Options Include Plastic ‘*Small Outline’* Packages, Ceramic Chip Carriers, and Plastic and Ceramic DIPs Dependable Texas Instruments Quality and Reliability description The 107 contain two independent JK flip-flops with individual JK, clock, and direct clear inputs. The ‘107 is

文件：827.19 Kbytes 頁數(shù)：19 Pages

TI

德州儀器

絲?。?a target="_blank" title="Marking" href="/74ls109a/marking.html">74LS109A；Package：SOP；DUAL JK POSITIVE-EDGE-TRIGGERED FLIP-FLOPS WITH PRESET AND CLEAR

Package Options Include Plastic “Small Outline’ Packages, Ceramic Chip Carriers and Flat Packages, and Plastic and Ceramic DIPs Dependable Texas Instruments Quality and Reliability description These devices contain two independent J-K positive- edge triggered flip-flops. A low level

文件：378.65 Kbytes 頁數(shù)：12 Pages

TI

德州儀器