Dual 2-Line to 4-Line Decoders/Demultiplexers

General Description These TTL circuits feature dual 1-line-to-4-line demultiplexers with individual strobes and common binary-address inputs in a single 16-pin package. When both sections are enabled by the strobes, the common address inputs sequentially select and route associated input data t

文件：63.97 Kbytes 頁數(shù)：6 Pages

FAIRCHILD

仙童半導體

Dual 2-line-to-4-line Decoders/Demultiplexers

● Quadrupie 2-Input Positive NAND Gates ● Quadruple 2-Input Positive NAND Gates (with Open Collector Output) (Continue....)

文件：73.17 Kbytes 頁數(shù)：6 Pages

HITACHIHitachi Semiconductor

日立日立公司

DUAL 1-OF-4 DECODER/ DEMULTIPLEXER

The SN54/74LS155 and SN54/74LS156 are high speed Dual 1-of-4 Decoder/Demultiplexers. These devices have two decoders with common 2-bit Address inputs and separate gated Enable inputs. Decoder “a” has an Enable gate with one active HIGH and one active LOW input. Decoder “b” has two active LOW Enabl

文件：210.75 Kbytes 頁數(shù)：6 Pages

MOTOROLA

摩托羅拉

DUAL 1-OF-4 DECODER/ DEMULTIPLEXER

The SN54/74LS155 and SN54/74LS156 are high speed Dual 1-of-4 Decoder/Demultiplexers. These devices have two decoders with common 2-bit Address inputs and separate gated Enable inputs. Decoder “a” has an Enable gate with one active HIGH and one active LOW input. Decoder “b” has two active LOW Enabl

文件：78 Kbytes 頁數(shù)：4 Pages

MOTOROLA

摩托羅拉

Dual 2-Line to 4-Line Decoders/Demultiplexers

文件：161.43 Kbytes 頁數(shù)：8 Pages

NSC

國半

DUAL 2-LINE TO 4-LINE DECODERS/DEMULTIPLEXERS

文件：732.93 Kbytes 頁數(shù)：17 Pages

TI

德州儀器

Dual 2-line-to-4-line Decoders / Demultiplexers

This circuit features dual 1-line-to-4-line demultiprexer with individual strobes and common binary-address input. When both sections are enabled by the strobes, the common binary-address inputs sequentially select and route associated input data to the appropriate output of each section. The indivi

Renesas

瑞薩

Dual 2-Line to 4-Line Decoders/Demultiplexers

ONSEMI

安森美半導體

Dual 2-line-to-4-line Decoders/Demultiplexers

HITACHI

日立

DUAL 1-OF-4 DECODER/ DEMULTIPLEXER

? Schottky Process for High Speed ? Multifunction Capability ? Common Address Inputs ? True or Complement Data Demultiplexing ? Input Clamp Diodes Limit High Speed Termination Effects ? ESD > 3500 Volts

文件：181.73 Kbytes 頁數(shù)：4 Pages

SOLIDSTATE