絲?。?strong>74HC595；Package：SO16；8-bit shift register with output latches (3-state)

Description The M74HC595 device is a high speed CMOS 8-bit shift register with output latches (3-state) fabricated with silicon gate C2MOS technology. This device contains an 8-bit serial in, parallel out shift register that feeds an 8-bit D-type storage register. The storage register has 8

文件：579.68 Kbytes 頁數(shù)：22 Pages

STMICROELECTRONICS

意法半導(dǎo)體

絲?。?a target="_blank" title="Marking" href="/74hc595d/marking.html">74HC595D；Package：SOIC16；CMOS Digital Integrated Circuits Silicon Monolithic

Functional Description ? 8-Bit Shift Register/Latch (3-state) General The 74HC595D is a high speed 8-BIT SHIFT REGISTER/LATCH fabricated with silicon gate C2MOS technology. It achieve the high speed operation similar to equivalent LSTTL while maintaining the CMOS low power dissipation. The 7

文件：271.76 Kbytes 頁數(shù)：17 Pages

TOSHIBA

東芝

絲?。?a target="_blank" title="Marking" href="/74hc595y/marking.html">74HC595Y；Package：SO16；8-bit shift register with output latches (3-state)

Description The M74HC595 device is a high speed CMOS 8-bit shift register with output latches (3-state) fabricated with silicon gate C2MOS technology. This device contains an 8-bit serial in, parallel out shift register that feeds an 8-bit D-type storage register. The storage register has 8

文件：579.68 Kbytes 頁數(shù)：22 Pages

STMICROELECTRONICS

意法半導(dǎo)體

絲印：74HC595D；Package：SOIC16；CMOS Digital Integrated Circuits Silicon Monolithic

Functional Description ? 8-Bit Shift Register/Latch (3-state) General The 74HC595D is a high speed 8-BIT SHIFT REGISTER/LATCH fabricated with silicon gate C2MOS technology. It achieve the high speed operation similar to equivalent LSTTL while maintaining the CMOS low power dissipation. The 7

文件：271.76 Kbytes 頁數(shù)：17 Pages

TOSHIBA

東芝

8-Bit Serial-Input/Serial or Parallel-Output Shift Register with Latched 3-State Outputs

8-Bit Serial-Input/Serial or Parallel-Output Shift Register with Latched 3-State Outputs The MC74HC595A consists of an 8?bit shift register and an 8?bit D?type latch with three?state parallel outputs. The shift register accepts serial data and provides a serial output. The shift register also pro

文件：248.98 Kbytes 頁數(shù)：12 Pages

ONSEMI

安森美半導(dǎo)體

8??it Serial??nput/Serial or Parallel??utput Shift Register with Latched 3??tate Outputs

The 74HC595 consists of an 8?bit shift register and an 8?bit D?type latch with three?state parallel outputs. The shift register accepts serial data and provides a serial output. The shift register also provides parallel data to the 8?bit latch. The shift register and latch have independent clock i

文件：160.83 Kbytes 頁數(shù)：13 Pages

ONSEMI

安森美半導(dǎo)體

8??it Serial??nput/Serial or Parallel.Output Shift Register with Latched 3??tate Outputs

The 74HC595 consists of an 8?bit shift register and an 8?bit D?type latch with three?state parallel outputs. The shift register accepts serial data and provides a serial output. The shift register also provides parallel data to the 8?bit latch. The shift register and latch have independent clock i

文件：160.83 Kbytes 頁數(shù)：13 Pages

ONSEMI

安森美半導(dǎo)體

8-bit Shift Register/Latch (with 3-state outputs)

Description This device each contains an 8-bit serial-in, parallel-out shift register that feeds an 8-bit D-type storage register. The storage register has parallel 3-state outputs. Separate clocks are provided for both the shift register and the storage register. The shift register has a direct-

文件：57.87 Kbytes 頁數(shù)：10 Pages

HITACHIHitachi Semiconductor

日立日立公司

8-bit serial-in/serial or parallel-out shift register with output latches; 3-state

DESCRIPTION The 74HC/HCT595 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. The 74HC/HCT595 is an 8-stage serial shift register with a storage register and 3-state outputs. The shift regi

文件：140.7 Kbytes 頁數(shù)：28 Pages

PHI

PHI

8-bit serial-in, serial or parallel-out shift register with output latches; 3-state

General description The 74HC595; 74HCT595 are high-speed Si-gate CMOS devices and are pin compatible with Low-power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard No. 7A. Features and benefits ■ 8-bit serial input ■ 8-bit serial or parallel output ■ Storage registe

文件：374.02 Kbytes 頁數(shù)：24 Pages

恩XP