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首頁 >74F37>規(guī)格書列表

型號(hào)	下載訂購	功能描述	制造商上傳企業(yè)	LOGO
74F373PC	文件：79.76 Kbytes Page：8 Pages	Octal Transparent Latch with 3-STATE Outputs General Description The 74F373 consists of eight latches with 3-STATE outputs for bus organized system applications. The flip-flops appear transparent to the data when Latch Enable (LE) is HIGH. When LE is LOW, the data that meets the setup times is latched. Data appears on the bus when the Outpu 文件：79.76 Kbytes 頁數(shù)：8 Pages	FAIRCHILD 仙童半導(dǎo)體	FAIRCHILD
74F373SC	文件：79.76 Kbytes Page：8 Pages	Octal Transparent Latch with 3-STATE Outputs General Description The 74F373 consists of eight latches with 3-STATE outputs for bus organized system applications. The flip-flops appear transparent to the data when Latch Enable (LE) is HIGH. When LE is LOW, the data that meets the setup times is latched. Data appears on the bus when the Outpu 文件：79.76 Kbytes 頁數(shù)：8 Pages	FAIRCHILD 仙童半導(dǎo)體	FAIRCHILD
74F373SC	文件：80.81 Kbytes Page：8 Pages	74F373 Octal Transparent Latch with 3-STATE Outputs General Description The 74F373 consists of eight latches with 3-STATE outputs for bus organized system applications. The flip-flops appear transparent to the data when Latch Enable (LE) is HIGH. When LE is LOW, the data that meets the setup times is latched. Data appears on the bus when the Outpu 文件：80.81 Kbytes 頁數(shù)：8 Pages	FAIRCHILD 仙童半導(dǎo)體	FAIRCHILD
74F373SCX	文件：80.81 Kbytes Page：8 Pages	74F373 Octal Transparent Latch with 3-STATE Outputs General Description The 74F373 consists of eight latches with 3-STATE outputs for bus organized system applications. The flip-flops appear transparent to the data when Latch Enable (LE) is HIGH. When LE is LOW, the data that meets the setup times is latched. Data appears on the bus when the Outpu 文件：80.81 Kbytes 頁數(shù)：8 Pages	FAIRCHILD 仙童半導(dǎo)體	FAIRCHILD
74F373SJ	文件：80.81 Kbytes Page：8 Pages	74F373 Octal Transparent Latch with 3-STATE Outputs General Description The 74F373 consists of eight latches with 3-STATE outputs for bus organized system applications. The flip-flops appear transparent to the data when Latch Enable (LE) is HIGH. When LE is LOW, the data that meets the setup times is latched. Data appears on the bus when the Outpu 文件：80.81 Kbytes 頁數(shù)：8 Pages	FAIRCHILD 仙童半導(dǎo)體	FAIRCHILD
74F373SJ	文件：79.76 Kbytes Page：8 Pages	Octal Transparent Latch with 3-STATE Outputs General Description The 74F373 consists of eight latches with 3-STATE outputs for bus organized system applications. The flip-flops appear transparent to the data when Latch Enable (LE) is HIGH. When LE is LOW, the data that meets the setup times is latched. Data appears on the bus when the Outpu 文件：79.76 Kbytes 頁數(shù)：8 Pages	FAIRCHILD 仙童半導(dǎo)體	FAIRCHILD
74F374	文件：93.64 Kbytes Page：12 Pages	Octal transparent latch 3-State DESCRIPTION The 74F373 is an octal transparent latch coupled to eight 3-State output devices. The two sections of the device are controlled independently by enable (E) and output enable (OE) control gates. The data on the D inputs is transferred to the latch outputs when the enable (E) input is 文件：93.64 Kbytes 頁數(shù)：12 Pages	PHI PHI	PHI
74F374	文件：268.67 Kbytes Page：14 Pages	Latch/flip-flop FEATURES ? 8-bit transparent latch — 74F373 ? 8-bit positive edge triggered register — 74F374 ? 3-State outputs glitch free during power-up and power-down ? Common 3-State output register ? Independent register and 3-State buffer operation ? SSOP Type II Package DESCRIPTION The 74F373 is a 文件：268.67 Kbytes 頁數(shù)：14 Pages	NEXPERIA 安世	NEXPERIA
74F374	文件：67.57 Kbytes Page：7 Pages	Octal D-Type Flip-Flop with 3-STATE Outputs General Description The 74F374 is a high-speed, low-power octal D-type flipflop featuring separate D-type inputs for each flip-flop and 3-STATE outputs for bus-oriented applications. A buffered Clock (CP) and Output Enable (OE) are common to all flipflops. Features ■ Edge-triggered D-type input 文件：67.57 Kbytes 頁數(shù)：7 Pages	FAIRCHILD 仙童半導(dǎo)體	FAIRCHILD
74F374MSA	文件：67.57 Kbytes Page：7 Pages	Octal D-Type Flip-Flop with 3-STATE Outputs General Description The 74F374 is a high-speed, low-power octal D-type flipflop featuring separate D-type inputs for each flip-flop and 3-STATE outputs for bus-oriented applications. A buffered Clock (CP) and Output Enable (OE) are common to all flipflops. Features ■ Edge-triggered D-type input 文件：67.57 Kbytes 頁數(shù)：7 Pages	FAIRCHILD 仙童半導(dǎo)體	FAIRCHILD

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技術(shù)參數(shù)

類型：
D 型
輸出類型：
三態(tài)，非反相
元件數(shù)：
1
每元件位數(shù)：
8
時(shí)鐘頻率：
140MHz
不同 V，最大 CL 時(shí)的最大傳播延遲：
8.5ns @ 5V，50pF
觸發(fā)器類型：
正邊沿
電流 - 輸出高，低：
3mA，24mA
電壓 - 電源：
4.5 V ~ 5.5 V
電流 - 靜態(tài)（Iq)：
86mA
工作溫度：
0°C ~ 70°C（TA）
安裝類型：
表面貼裝
封裝/外殼：
20-SOIC（0.295\，7.50mm 寬）

供應(yīng)商	型號(hào)	品牌	批號(hào)	封裝	庫存	備注	價(jià)格
深圳市一線半導(dǎo)體有限公司	74F37		24+		5000	公司存貨	詢價(jià)
深圳市歐立現(xiàn)代科技有限公司	74F37	NS	24+	SOP5.2	6980	原裝現(xiàn)貨,可開13%稅票	詢價(jià)
深圳市華來深電子有限公司	74F37	MC	23+	SOP14/5	8650	受權(quán)代理!全新原裝現(xiàn)貨特價(jià)熱賣!	詢價(jià)
芯有半導(dǎo)體（深圳）有限公司	74F374SCX	NATIONAL	06+	原廠原裝	1051	只做全新原裝真實(shí)現(xiàn)貨供應(yīng)	詢價(jià)
深圳市粵科源興科技有限公司	74F377PC	FSC	13+	PDIP-20	1988	原裝分銷	詢價(jià)
深圳市毅創(chuàng)騰電子科技有限公司	74F374	NS		DIP	1000	原裝長(zhǎng)期供貨!	詢價(jià)
深圳市益百分電子有限公司	74F374PC	FAIR	87+	DIP20	2760	全新原裝進(jìn)口自己庫存優(yōu)勢(shì)	詢價(jià)
深圳市凌旭科技有限公司	74F374N	恩XP	2016+	DIP	3000	只做原裝,假一罰十,公司可開17%增值稅發(fā)票!	詢價(jià)
深圳市弘為電子有限公司	74F373PC	FAIR	24+	原廠封裝	8060	原裝現(xiàn)貨假一罰十	詢價(jià)
齊創(chuàng)科技(上海,北京,青島)有限公司	74F374D	恩XP	23+	SOP20	5000	原裝正品,假一罰十	詢價(jià)

更多74F37供應(yīng)商更新時(shí)間2026-1-19 16:00:00

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