MONOLITHIC QUADRUPLE FIXED DELAY LINE

FUNCTIONAL DESCRIPTION The 3D3324 Quadruple Delay Line product family consists of fixed delay CMOS integrated circuits. Each package contains four matched, independent delay lines. Delay values can range from 10ns through 6000ns. The input is reproduced at the output without inversion, shifted in

文件：243.91 Kbytes 頁數(shù)：4 Pages

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MONOLITHIC QUADRUPLE FIXED DELAY LINE

FUNCTIONAL DESCRIPTION The 3D3324 Quadruple Delay Line product family consists of fixed delay CMOS integrated circuits. Each package contains four matched, independent delay lines. Delay values can range from 10ns through 6000ns. The input is reproduced at the output without inversion, shifted in

文件：243.91 Kbytes 頁數(shù)：4 Pages

DATADELAY

MONOLITHIC QUADRUPLE FIXED DELAY LINE

FUNCTIONAL DESCRIPTION The 3D3324 Quadruple Delay Line product family consists of fixed delay CMOS integrated circuits. Each package contains four matched, independent delay lines. Delay values can range from 10ns through 6000ns. The input is reproduced at the output without inversion, shifted in

文件：243.91 Kbytes 頁數(shù)：4 Pages

DATADELAY

MONOLITHIC QUADRUPLE FIXED DELAY LINE

FUNCTIONAL DESCRIPTION The 3D3324 Quadruple Delay Line product family consists of fixed delay CMOS integrated circuits. Each package contains four matched, independent delay lines. Delay values can range from 10ns through 6000ns. The input is reproduced at the output without inversion, shifted in

文件：243.91 Kbytes 頁數(shù)：4 Pages

DATADELAY

MONOLITHIC QUADRUPLE FIXED DELAY LINE

FUNCTIONAL DESCRIPTION The 3D3324 Quadruple Delay Line product family consists of fixed delay CMOS integrated circuits. Each package contains four matched, independent delay lines. Delay values can range from 10ns through 6000ns. The input is reproduced at the output without inversion, shifted in

文件：243.91 Kbytes 頁數(shù)：4 Pages

DATADELAY

MONOLITHIC QUADRUPLE FIXED DELAY LINE

FUNCTIONAL DESCRIPTION The 3D3324 Quadruple Delay Line product family consists of fixed delay CMOS integrated circuits. Each package contains four matched, independent delay lines. Delay values can range from 10ns through 6000ns. The input is reproduced at the output without inversion, shifted in

文件：243.91 Kbytes 頁數(shù)：4 Pages

DATADELAY

MONOLITHIC QUADRUPLE FIXED DELAY LINE

FUNCTIONAL DESCRIPTION The 3D3324 Quadruple Delay Line product family consists of fixed delay CMOS integrated circuits. Each package contains four matched, independent delay lines. Delay values can range from 10ns through 6000ns. The input is reproduced at the output without inversion, shifted in

文件：243.91 Kbytes 頁數(shù)：4 Pages

DATADELAY

MONOLITHIC QUADRUPLE FIXED DELAY LINE

FUNCTIONAL DESCRIPTION The 3D3324 Quadruple Delay Line product family consists of fixed delay CMOS integrated circuits. Each package contains four matched, independent delay lines. Delay values can range from 10ns through 6000ns. The input is reproduced at the output without inversion, shifted in

文件：243.91 Kbytes 頁數(shù)：4 Pages

DATADELAY

MONOLITHIC 8-BIT PROGRAMMABLE DELAY LINE (SERIES 3D3418 - LOW NOISE)

FUNCTIONAL DESCRIPTION The 3D3418 Programmable 8-Bit Silicon Delay Line product family consists of 8-bit, user-programmable CMOS silicon integrated circuits. Delay values, programmed either via the serial or parallel interface, can be varied over 255 equal steps ranging from 250ps to 7.5ns inclus

文件：408.53 Kbytes 頁數(shù)：7 Pages

DATADELAY

MONOLITHIC 8-BIT PROGRAMMABLE DELAY LINE (SERIES 3D3418 - LOW NOISE)

FUNCTIONAL DESCRIPTION The 3D3418 Programmable 8-Bit Silicon Delay Line product family consists of 8-bit, user-programmable CMOS silicon integrated circuits. Delay values, programmed either via the serial or parallel interface, can be varied over 255 equal steps ranging from 250ps to 7.5ns inclus

文件：408.53 Kbytes 頁數(shù)：7 Pages

DATADELAY