MONOLITHIC TRIPLE FIXED DELAY LINE

FUNCTIONAL DESCRIPTION The 3D3323 Triple Delay Line product family consists of fixed-delay CMOS integrated circuits. Each package contains three matched, independent delay lines. Delay values can range from 10ns through 6000ns. The input is reproduced at the output without inversion, shifted in t

文件：241.95 Kbytes 頁數(shù)：4 Pages

DATADELAY

MONOLITHIC QUADRUPLE FIXED DELAY LINE

FUNCTIONAL DESCRIPTION The 3D3324 Quadruple Delay Line product family consists of fixed delay CMOS integrated circuits. Each package contains four matched, independent delay lines. Delay values can range from 10ns through 6000ns. The input is reproduced at the output without inversion, shifted in

文件：243.91 Kbytes 頁數(shù)：4 Pages

DATADELAY

MONOLITHIC QUADRUPLE FIXED DELAY LINE

FUNCTIONAL DESCRIPTION The 3D3324 Quadruple Delay Line product family consists of fixed delay CMOS integrated circuits. Each package contains four matched, independent delay lines. Delay values can range from 10ns through 6000ns. The input is reproduced at the output without inversion, shifted in

文件：243.91 Kbytes 頁數(shù)：4 Pages

DATADELAY

MONOLITHIC QUADRUPLE FIXED DELAY LINE

FUNCTIONAL DESCRIPTION The 3D3324 Quadruple Delay Line product family consists of fixed delay CMOS integrated circuits. Each package contains four matched, independent delay lines. Delay values can range from 10ns through 6000ns. The input is reproduced at the output without inversion, shifted in

文件：243.91 Kbytes 頁數(shù)：4 Pages

DATADELAY

MONOLITHIC QUADRUPLE FIXED DELAY LINE

FUNCTIONAL DESCRIPTION The 3D3324 Quadruple Delay Line product family consists of fixed delay CMOS integrated circuits. Each package contains four matched, independent delay lines. Delay values can range from 10ns through 6000ns. The input is reproduced at the output without inversion, shifted in

文件：243.91 Kbytes 頁數(shù)：4 Pages

DATADELAY

MONOLITHIC QUADRUPLE FIXED DELAY LINE

FUNCTIONAL DESCRIPTION The 3D3324 Quadruple Delay Line product family consists of fixed delay CMOS integrated circuits. Each package contains four matched, independent delay lines. Delay values can range from 10ns through 6000ns. The input is reproduced at the output without inversion, shifted in

文件：243.91 Kbytes 頁數(shù)：4 Pages

DATADELAY

MONOLITHIC QUADRUPLE FIXED DELAY LINE

FUNCTIONAL DESCRIPTION The 3D3324 Quadruple Delay Line product family consists of fixed delay CMOS integrated circuits. Each package contains four matched, independent delay lines. Delay values can range from 10ns through 6000ns. The input is reproduced at the output without inversion, shifted in

文件：243.91 Kbytes 頁數(shù)：4 Pages

DATADELAY

MONOLITHIC QUADRUPLE FIXED DELAY LINE

FUNCTIONAL DESCRIPTION The 3D3324 Quadruple Delay Line product family consists of fixed delay CMOS integrated circuits. Each package contains four matched, independent delay lines. Delay values can range from 10ns through 6000ns. The input is reproduced at the output without inversion, shifted in

文件：243.91 Kbytes 頁數(shù)：4 Pages

DATADELAY

MONOLITHIC QUADRUPLE FIXED DELAY LINE

FUNCTIONAL DESCRIPTION The 3D3324 Quadruple Delay Line product family consists of fixed delay CMOS integrated circuits. Each package contains four matched, independent delay lines. Delay values can range from 10ns through 6000ns. The input is reproduced at the output without inversion, shifted in

文件：243.91 Kbytes 頁數(shù)：4 Pages

DATADELAY

MONOLITHIC QUADRUPLE FIXED DELAY LINE

FUNCTIONAL DESCRIPTION The 3D3324 Quadruple Delay Line product family consists of fixed delay CMOS integrated circuits. Each package contains four matched, independent delay lines. Delay values can range from 10ns through 6000ns. The input is reproduced at the output without inversion, shifted in

文件：243.91 Kbytes 頁數(shù)：4 Pages

DATADELAY