CMOS Dual 4-Stage Static Shift Register

文件：229.06 Kbytes 頁數(shù)：8 Pages

UTC

友順

cmos dual 4-stage static shift register

UCD4015 consists of two identical,independent,4-stageserial-input/parallel-output registers. Each register has independent CLOCK and RESET input as well as a single serial DATA input. ”Q” outputs are available from each of the four stages on both registers. All registers stages are D-type,master-sla ? 12MHz (typ.) clock rate at 10V \n? Maximum input current of 1μA at 18V \n? Fully static operation \n? 8 master-slave flip-flops plus input and output buffering;

UTC

友順

CMOS Dual 4-Stage Static Shift Register

文件：229.06 Kbytes 頁數(shù)：8 Pages

UTC

友順

CMOS Dual 4-Stage Static Shift Register

文件：229.75 Kbytes 頁數(shù)：8 Pages

UTC

友順

CMOS DUAL 4-STAGE STATIC SHIFT REGISTER

文件：230.36 Kbytes 頁數(shù)：9 Pages

UTC

友順

CMOS Dual 4-Stage Static Shift Register

文件：229.75 Kbytes 頁數(shù)：8 Pages

UTC

友順

CMOS DUAL 4-STAGE STATIC SHIFT REGISTER

文件：230.36 Kbytes 頁數(shù)：9 Pages

UTC

友順

CMOS DUAL 4-STAGE STATIC SHIFT REGISTER

文件：230.36 Kbytes 頁數(shù)：9 Pages

UTC

友順

CMOS DUAL 4-STAGE STATIC SHIFT REGISTER

文件：230.36 Kbytes 頁數(shù)：9 Pages

UTC

友順

CMOS Dual 4-Stage Static Shift Register

文件：229.75 Kbytes 頁數(shù)：8 Pages

UTC

友順