DUAL D-TYPE POSITIVE-EDGE-TRIGGERED FLIP-FLIP-FLOPS WITH PRESET AND CLEAR

文件：1.26312 Mbytes 頁數(shù)：21 Pages

TI

德州儀器

DUAL D-TYPE POSITIVE-EDGE-TRIGGERED FLIP-FLOPS WITH PRESET AND CLEAR

文件：1.26034 Mbytes 頁數(shù)：23 Pages

TI

德州儀器

DUAL D-TYPE POSITIVE-EDGE-TRIGGERED FLIP-FLOPS WITH PRESET AND CLEAR

文件：699.19 Kbytes 頁數(shù)：18 Pages

TI

德州儀器

DUAL D-TYPE POSITIVE-EDGE-TRIGGERED FLIP-FLOPS WITH PRESET AND CLEAR

文件：699.19 Kbytes 頁數(shù)：18 Pages

TI

德州儀器

DUAL D-TYPE POSITIVE-EDGE-TRIGGERED FLIP-FLOPS WITH PRESET AND CLEAR

文件：1.26034 Mbytes 頁數(shù)：23 Pages

TI

德州儀器

DUAL D-TYPE POSITIVE-EDGE-TRIGGERED FLIP-FLIP-FLOPS WITH PRESET AND CLEAR

文件：1.26312 Mbytes 頁數(shù)：21 Pages

TI

德州儀器

DUAL D-TYPE POSITIVE EDGE-TRIGGERED FLIP-FLOP LOW POWER SCHOTTKY

DUAL D-TYPE POSITIVE EDGE-TRIGGERED FLIP-FLOPThe SN54/74LS74A dual edge-triggered flip-flop utilizes Schottky TTL circuitry to produce high speed D-type flip-flops. Each flip-flop has individual clear and set inputs, and also complementary Q and Q outputs.\nInformation at input D is transferred to t

恩XP

具有預(yù)置和清零端的雙路正邊沿觸發(fā)式 D 型觸發(fā)器

These devices contain two independent D-type positive-edge-triggered flip-flops. A low level at the preset or clear inputs sets or resets the outputs regardless of the levels of the other inputs. When preset and clear are inactive (high), data at the D input meeting the setup time requirements are t ? Package Options Include Plastic “Small Outline\" Packages, Ceramic Chip Carriers and Flat Packages, and Plastic and Ceramic DIPs\n? Dependable Texas Instruments Quality and Reliability;

TI

德州儀器

Package：14-SSOP（0.209"，5.30mm 寬）；包裝：管件 功能：設(shè)置（預(yù)設(shè)）和復(fù)位 類別：集成電路（IC） 觸發(fā)器 描述：IC FF D-TYPE DUAL 1BIT 14SSOP

TI

德州儀器

Package：14-SOIC（0.154"，3.90mm 寬）；包裝：管件 功能：設(shè)置（預(yù)設(shè)）和復(fù)位 類別：集成電路（IC） 觸發(fā)器 描述：IC FF D-TYPE DUAL 1BIT 14SOIC

TI

德州儀器