| 型號(hào) | 下載 訂購(gòu) | 功能描述 | 制造商 上傳企業(yè) | LOGO |
|---|---|---|---|---|
SN74LS73 | DUAL JK NEGATIVE EDGE-TRIGGERED FLIP-FLOP DUAL JK NEGATIVE EDGE-TRIGGERED FLIP-FLOP TheSN54LS/74LS73A offers individual J, K, clear, and clock inputs.These dualflip-flops aredesigned so that when the clock goes HIGH, the inputs are enabledand data will be accepted. The logic level of the J and K inputs may beallowed to change when the 文件：73.83 Kbytes 頁(yè)數(shù)：3 Pages | MOTOROLA 摩托羅拉 | MOTOROLA | |
DUAL J-K FLIP-FLOPS WITH CLEAR Package Options Include Plastic ‘*Small Outline’” Packages, Flat Packages, and Plastic and Ceramic DIPs Dependable Texas Instruments Quality and Reliability description The ‘73, and 'H73, contain two independent JK flip-flops with individual J-K, clock, and direct clear inputs. The ‘ 文件：810.42 Kbytes 頁(yè)數(shù)：20 Pages | TI 德州儀器 | TI | ||
絲?。?a target="_blank" title="Marking" href="/ls73a/marking.html">LS73A；Package：SOIC；DUAL J-K FLIP-FLOPS WITH CLEAR Package Options Include Plastic ‘*Small Outline’” Packages, Flat Packages, and Plastic and Ceramic DIPs Dependable Texas Instruments Quality and Reliability description The ‘73, and 'H73, contain two independent JK flip-flops with individual J-K, clock, and direct clear inputs. The ‘ 文件：810.42 Kbytes 頁(yè)數(shù)：20 Pages | TI 德州儀器 | TI | ||
絲?。?a target="_blank" title="Marking" href="/ls73a/marking.html">LS73A；Package：SOIC；DUAL J-K FLIP-FLOPS WITH CLEAR Package Options Include Plastic ‘*Small Outline’” Packages, Flat Packages, and Plastic and Ceramic DIPs Dependable Texas Instruments Quality and Reliability description The ‘73, and 'H73, contain two independent JK flip-flops with individual J-K, clock, and direct clear inputs. The ‘ 文件：810.42 Kbytes 頁(yè)數(shù)：20 Pages | TI 德州儀器 | TI | ||
絲?。?a target="_blank" title="Marking" href="/ls73a/marking.html">LS73A；Package：SOIC；DUAL J-K FLIP-FLOPS WITH CLEAR Package Options Include Plastic ‘*Small Outline’” Packages, Flat Packages, and Plastic and Ceramic DIPs Dependable Texas Instruments Quality and Reliability description The ‘73, and 'H73, contain two independent JK flip-flops with individual J-K, clock, and direct clear inputs. The ‘ 文件：810.42 Kbytes 頁(yè)數(shù)：20 Pages | TI 德州儀器 | TI | ||
絲?。?a target="_blank" title="Marking" href="/sn74ls73an/marking.html">SN74LS73AN；Package：PDIP；DUAL J-K FLIP-FLOPS WITH CLEAR Package Options Include Plastic ‘*Small Outline’” Packages, Flat Packages, and Plastic and Ceramic DIPs Dependable Texas Instruments Quality and Reliability description The ‘73, and 'H73, contain two independent JK flip-flops with individual J-K, clock, and direct clear inputs. The ‘ 文件：810.42 Kbytes 頁(yè)數(shù)：20 Pages | TI 德州儀器 | TI | ||
絲?。?a target="_blank" title="Marking" href="/sn74ls73an/marking.html">SN74LS73AN；Package：PDIP；DUAL J-K FLIP-FLOPS WITH CLEAR Package Options Include Plastic ‘*Small Outline’” Packages, Flat Packages, and Plastic and Ceramic DIPs Dependable Texas Instruments Quality and Reliability description The ‘73, and 'H73, contain two independent JK flip-flops with individual J-K, clock, and direct clear inputs. The ‘ 文件：810.42 Kbytes 頁(yè)數(shù)：20 Pages | TI 德州儀器 | TI | ||
絲印：SN74LS73AN；Package：PDIP；DUAL J-K FLIP-FLOPS WITH CLEAR Package Options Include Plastic ‘*Small Outline’” Packages, Flat Packages, and Plastic and Ceramic DIPs Dependable Texas Instruments Quality and Reliability description The ‘73, and 'H73, contain two independent JK flip-flops with individual J-K, clock, and direct clear inputs. The ‘ 文件：810.42 Kbytes 頁(yè)數(shù)：20 Pages | TI 德州儀器 | TI | ||
DUAL JK NEGATIVE EDGE-TRIGGERED FLIP-FLOP DUAL JK NEGATIVE EDGE-TRIGGERED FLIP-FLOP TheSN54LS/74LS73A offers individual J, K, clear, and clock inputs.These dualflip-flops aredesigned so that when the clock goes HIGH, the inputs are enabledand data will be accepted. The logic level of the J and K inputs may beallowed to change when the 文件：73.83 Kbytes 頁(yè)數(shù)：3 Pages | MOTOROLA 摩托羅拉 | MOTOROLA | ||
DUAL JK NEGATIVE EDGE-TRIGGERED FLIP-FLOP DUAL JK NEGATIVE EDGE-TRIGGERED FLIP-FLOP TheSN54LS/74LS73A offers individual J, K, clear, and clock inputs.These dualflip-flops aredesigned so that when the clock goes HIGH, the inputs are enabledand data will be accepted. The logic level of the J and K inputs may beallowed to change when the 文件：73.83 Kbytes 頁(yè)數(shù)：3 Pages | MOTOROLA 摩托羅拉 | MOTOROLA |
替換型號(hào)
- 443-828
- 612308-1
- 74LS73
- 74LS73CH
- 74LS73J
- 74LS73W
- ECG74LS73
- HD74LS73
- HD74LS73P
- HE-443-828
- M74LS73AP
- M74LS73P
- MB74LS73A
- MB74LS73AM
- N74LS73F
- N74LS73N
- NTE74LS73
- SK74LS73
- SK74LS73A
- SN74LS73A
- SN74LS73AJ
- SN74LS73AJD
- SN74LS73AJDS
- SN74LS73AJS
- SN74LS73AN
- SN74LS73AND
- SN74LS73ANDS
- SN74LS73ANS
- SN74LS73AW
- SN74LS73J
- SN74LS73N
- TCG74LS73
- X420300730
技術(shù)參數(shù)
- Technology Family：
LS
- Supply voltage (Min) (V)：
4.75
- Supply voltage (Max) (V)：
5.25
- Input type：
Bipolar
- Output type：
Push-Pull
- Clock Frequency (MHz)：
13
- ICC (Max) (uA)：
6000
- IOL (Max) (mA)：
8
- IOH (Max) (mA)：
-0.4
- Features：
Negative edge triggered
| 供應(yīng)商 | 型號(hào) | 品牌 | 批號(hào) | 封裝 | 庫(kù)存 | 備注 | 價(jià)格 |
|---|---|---|---|---|---|---|---|
TEXAS |
24+ |
DIP14P |
6868 |
原裝現(xiàn)貨,可開13%稅票 |
詢價(jià) | ||
TI |
25+ |
標(biāo)準(zhǔn)封裝 |
18000 |
原廠直接發(fā)貨進(jìn)口原裝 |
詢價(jià) | ||
TI |
24+ |
DIP-14 |
49 |
本站庫(kù)存 |
詢價(jià) | ||
TI |
23+ |
SOP14 |
5500 |
現(xiàn)貨,全新原裝 |
詢價(jià) | ||
TI |
24+ |
DIP-14 |
5000 |
只做原裝公司現(xiàn)貨 |
詢價(jià) | ||
TI |
04+ |
SOP/14 |
480 |
原裝現(xiàn)貨海量庫(kù)存歡迎咨詢 |
詢價(jià) | ||
MOT |
24+ |
DIP |
20000 |
一級(jí)代理原裝現(xiàn)貨假一罰十 |
詢價(jià) | ||
M |
23+ |
PDIP |
8560 |
受權(quán)代理!全新原裝現(xiàn)貨特價(jià)熱賣! |
詢價(jià) | ||
TI |
18+ |
DIP16 |
85600 |
保證進(jìn)口原裝可開17%增值稅發(fā)票 |
詢價(jià) | ||
M |
24+ |
PDIP |
200 |
進(jìn)口原裝正品優(yōu)勢(shì)供應(yīng) |
詢價(jià) |
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