Quad Exclusive-OR Gate

The SL4030B types consist of four independent Exclusive-OR gates. The SL4030B provides the system designer with a means for direct implementation of the Exlusive-OR function. · Operating Voltage Range: 3.0 to 18 V · Maximum input current of 1 μA at 18 V over full package temperature range;

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Quad Exclusive-OR Gate

The SL4030B types consist of four independent Exclusive-OR gates. The SL4030B provides the system designer with a means for direct implementation of the Exlusive-OR function. · Operating Voltage Range: 3.0 to 18 V · Maximum input current of 1 μA at 18 V over full package temperature range;

文件：37.52 Kbytes 頁(yè)數(shù)：4 Pages

SLS

Quad Exclusive-OR Gate

The SL4030B types consist of four independent Exclusive-OR gates. The SL4030B provides the system designer with a means for direct implementation of the Exlusive-OR function. · Operating Voltage Range: 3.0 to 18 V · Maximum input current of 1 μA at 18 V over full package temperature range;

文件：37.52 Kbytes 頁(yè)數(shù)：4 Pages

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8-Stage Static Bidirectional Parallel/ Serial Input/Output Bus Register

8-Stage Static Bidirectional Parallel/Serial Input/Output Bus Register High-Voltage Silicon-Gate CMOS The SL4034B is a static eight-stage parallel-or serial-input paralleloutput register. It can be used to: 1) bidirectionally transfer parallel information between two buses, 2) convert serial dat

文件：71.86 Kbytes 頁(yè)數(shù)：9 Pages

SLS

8-Stage Static Bidirectional Parallel/ Serial Input/Output Bus Register

8-Stage Static Bidirectional Parallel/Serial Input/Output Bus Register High-Voltage Silicon-Gate CMOS The SL4034B is a static eight-stage parallel-or serial-input paralleloutput register. It can be used to: 1) bidirectionally transfer parallel information between two buses, 2) convert serial dat

文件：71.86 Kbytes 頁(yè)數(shù)：9 Pages

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Quad 3-State R/S Latch

Quad 3-State R/S Latch High-Voltage Silicon-Gate CMOS The SL4043B types are quad cross-coupled 3-state CMOS NOR latces. Each latch has a separate Q output and individual SET and RESET inputs. The Q outputs are controlled by a common ENABLE input. A logic “1” or high on the ENABLE input connects t

文件：44.22 Kbytes 頁(yè)數(shù)：6 Pages

SLS

Quad 3-State R/S Latch

Quad 3-State R/S Latch High-Voltage Silicon-Gate CMOS The SL4043B types are quad cross-coupled 3-state CMOS NOR latces. Each latch has a separate Q output and individual SET and RESET inputs. The Q outputs are controlled by a common ENABLE input. A logic “1” or high on the ENABLE input connects t

文件：44.22 Kbytes 頁(yè)數(shù)：6 Pages

SLS

Quad 3-State R/S Latch

Quad 3-State R/S Latch High-Voltage Silicon-Gate CMOS The SL4043B types are quad cross-coupled 3-state CMOS NOR latces. Each latch has a separate Q output and individual SET and RESET inputs. The Q outputs are controlled by a common ENABLE input. A logic “1” or high on the ENABLE input connects t

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Hex Buffer/Converter

The SL4049B is inverting hex buffers and feature logic-level conversion using only one supply (voltage (VCC). The input-signal high level (VIH) can exceed the VCC supply voltage when these devices are used for logic-level conversions. These devices are intended for use as CMOS to DTL/TTL converter

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Hex Buffer/Converter

The SL4049B is inverting hex buffers and feature logic-level conversion using only one supply (voltage (VCC). The input-signal high level (VIH) can exceed the VCC supply voltage when these devices are used for logic-level conversions. These devices are intended for use as CMOS to DTL/TTL converter

文件：33.05 Kbytes 頁(yè)數(shù)：4 Pages

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