Quad AND/OR Select Gate

Quad AND/OR Select Gate High-Voltage Silicon-Gate CMOS The SL4019B types consist of four AND/OR select gate configurations, each consisting of two 2-input AND gates driving a single 2-input gate. Selection is accomplished by control bits Sa and Sb .In addition to selection of either channel A or

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Quad AND/OR Select Gate

Quad AND/OR Select Gate High-Voltage Silicon-Gate CMOS The SL4019B types consist of four AND/OR select gate configurations, each consisting of two 2-input AND gates driving a single 2-input gate. Selection is accomplished by control bits Sa and Sb .In addition to selection of either channel A or

文件：43.55 Kbytes 頁(yè)數(shù)：4 Pages

SLS

Quad AND/OR Select Gate

Quad AND/OR Select Gate High-Voltage Silicon-Gate CMOS The SL4019B types consist of four AND/OR select gate configurations, each consisting of two 2-input AND gates driving a single 2-input gate. Selection is accomplished by control bits Sa and Sb .In addition to selection of either channel A or

文件：43.55 Kbytes 頁(yè)數(shù)：4 Pages

SLS

14 Stage Ripple-Carry Binary Counter/Divider

The SL4020B is ripple-carry binary counter. All counter stages are master-slave flip-flops. The state of a counter advances one count on the negative transition of each input pulse; a high level on the RESET line resets the counter to its all zeros state. Schmitt trigger action on the input-pulse

文件：59.41 Kbytes 頁(yè)數(shù)：6 Pages

SLS

14 Stage Ripple-Carry Binary Counter/Divider

The SL4020B is ripple-carry binary counter. All counter stages are master-slave flip-flops. The state of a counter advances one count on the negative transition of each input pulse; a high level on the RESET line resets the counter to its all zeros state. Schmitt trigger action on the input-pulse

文件：59.41 Kbytes 頁(yè)數(shù)：6 Pages

SLS

14 Stage Ripple-Carry Binary Counter/Divider

The SL4020B is ripple-carry binary counter. All counter stages are master-slave flip-flops. The state of a counter advances one count on the negative transition of each input pulse; a high level on the RESET line resets the counter to its all zeros state. Schmitt trigger action on the input-pulse

文件：59.41 Kbytes 頁(yè)數(shù)：6 Pages

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Triple 3-Input NAND Gate

Triple 3-Input NAND Gate High-Voltage Silicon-Gate CMOS The SL4023B NAND gates provide the system designer with direct emplementation of the NAND function. ? Operating Voltage Range: 3.0 to 18 V ? Maximum input current of 1 μA at 18 V over full package temperature range; 100 nA at 18 V and 2

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SLS

Triple 3-Input NAND Gate

Triple 3-Input NAND Gate High-Voltage Silicon-Gate CMOS The SL4023B NAND gates provide the system designer with direct emplementation of the NAND function. ? Operating Voltage Range: 3.0 to 18 V ? Maximum input current of 1 μA at 18 V over full package temperature range; 100 nA at 18 V and 2

文件：30.89 Kbytes 頁(yè)數(shù)：4 Pages

SLS

Triple 3-Input NAND Gate

Triple 3-Input NAND Gate High-Voltage Silicon-Gate CMOS The SL4023B NAND gates provide the system designer with direct emplementation of the NAND function. ? Operating Voltage Range: 3.0 to 18 V ? Maximum input current of 1 μA at 18 V over full package temperature range; 100 nA at 18 V and 2

文件：30.89 Kbytes 頁(yè)數(shù)：4 Pages

SLS

Triple 3-Input NOR Gate

Triple 3-Input NOR Gate High-Voltage Silicon-Gate CMOS The SL4025B NOR gates provide the system designer with direct emplementation of the NOR function. ? Operating Voltage Range: 3.0 to 18 V ? Maximum input current of 1 μA at 18 V over full package temperature range; 100 nA at 18 V and 25°

文件：31.42 Kbytes 頁(yè)數(shù)：4 Pages

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