絲?。?strong>SI53342；Package：24-QFN；Low-Jitter LVDS Fanout Clock Buffers

FEATURES ? Ultra-low additive jitter: 50 fs rms ? Built-in LDOs for high PSRR performance ? Up to 10 LVDS Outputs ? Any-format Inputs (LVPECL, Low-Power LVPECL, LVDS, CML, HCSL, LVCMOS) ? Wide frequency range: dc to 1250 MHz ? Output Enable option ? Multiple configuration options ? 2:1 In

文件：2.24064 Mbytes 頁數(shù)：38 Pages

SKYWORKS

思佳訊

絲?。?strong>SI53342；Package：24-QFN；Low-Jitter LVDS Fanout Clock Buffers

FEATURES ? Ultra-low additive jitter: 50 fs rms ? Built-in LDOs for high PSRR performance ? Up to 10 LVDS Outputs ? Any-format Inputs (LVPECL, Low-Power LVPECL, LVDS, CML, HCSL, LVCMOS) ? Wide frequency range: dc to 1250 MHz ? Output Enable option ? Multiple configuration options ? 2:1 In

文件：2.24064 Mbytes 頁數(shù)：38 Pages

SKYWORKS

思佳訊

Low-Jitter LVDS Fanout Clock Buffers

FEATURES ? Ultra-low additive jitter: 50 fs rms ? Built-in LDOs for high PSRR performance ? Up to 10 LVDS Outputs ? Any-format Inputs (LVPECL, Low-Power LVPECL, LVDS, CML, HCSL, LVCMOS) ? Wide frequency range: dc to 1250 MHz ? Output Enable option ? Multiple configuration options ? 2:1 In

文件：2.24064 Mbytes 頁數(shù)：38 Pages

SKYWORKS

思佳訊

Low-Jitter LVDS Fanout Clock Buffers with up to 10 LVDS Outputs from Any-Format Input and Wide Frequency Range from dc up to 1250 MHz

KEY FEATURES ? Ultra-low additive jitter: 50 fs rms ? Built-in LDOs for high PSRR performance ? Up to 10 LVDS Outputs ? Any-format Inputs (LVPECL, Low-Power LVPECL, LVDS, CML, HCSL, LVCMOS) ? Wide frequency range: dc to 1250 MHz ? Output Enable option ? Multiple configuration options ? 2:

文件：2.24064 Mbytes 頁數(shù)：38 Pages

SKYWORKS

思佳訊

Multiple configuration options

文件：947.87 Kbytes 頁數(shù)：38 Pages

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