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首頁 >SI531>規(guī)格書列表

型號(hào)	下載訂購	功能描述	制造商上傳企業(yè)	LOGO
SI53108-A01AGMR	文件：1.37514 Mbytes Page：37 Pages	DB800ZL 8-OUTPUT PCIE GEN 3 BUFFER/ZERO DELAY BUFFER Features ? Eight 0.7 V low-power, push-pull, HCSL-compatible PCIe Gen 3 outputs ? Individual OE HW pins for each output clock ? 100 MHz /133 MHz PLL operation, supports PCIe and QPI ? SMBus address is 0xD8 ? PLL or bypass mode ? Spread spectrum tolerable ? 1.05 to 3.3 V power supply v 文件：1.37514 Mbytes 頁數(shù)：37 Pages	SKYWORKS 思佳訊	SKYWORKS
SI5310-BM	文件：516.64 Kbytes Page：26 Pages	PRECISION CLOCK MULTIPLIER/REGENERATOR IC Description The Si5310 is a fully integrated low-power clock multiplier and clock regenerator IC. The clock multiplier generates an output clock that is an integer multiple of the input clock. The clock regenerator operates simultaneously, creating a “clean” version of the input clock by using th 文件：516.64 Kbytes 頁數(shù)：26 Pages	SILABS 芯科科技	SILABS
SI5310-GM	文件：516.64 Kbytes Page：26 Pages	PRECISION CLOCK MULTIPLIER/REGENERATOR IC Description The Si5310 is a fully integrated low-power clock multiplier and clock regenerator IC. The clock multiplier generates an output clock that is an integer multiple of the input clock. The clock regenerator operates simultaneously, creating a “clean” version of the input clock by using th 文件：516.64 Kbytes 頁數(shù)：26 Pages	SILABS 芯科科技	SILABS
SI53112	文件：1.37237 Mbytes Page：35 Pages	DB1200ZL 12-OUTPUT PCIE GEN 3 BUFFER Features ? Twelve 0.7 V low-power, pushpull, HCSL-compatible PCIe Gen 3 outputs ? Individual OE HW pins for each output clock ? 100 MHz /133 MHz PLL operation, supports PCIe and QPI ? PLL bandwidth SW SMBUS programming overrides the latch value from HW pin ? 9 selectable SMBUS addresse 文件：1.37237 Mbytes 頁數(shù)：35 Pages	SKYWORKS 思佳訊	SKYWORKS
SI53112-A00AGM	文件：1.37237 Mbytes Page：35 Pages	DB1200ZL 12-OUTPUT PCIE GEN 3 BUFFER Features ? Twelve 0.7 V low-power, pushpull, HCSL-compatible PCIe Gen 3 outputs ? Individual OE HW pins for each output clock ? 100 MHz /133 MHz PLL operation, supports PCIe and QPI ? PLL bandwidth SW SMBUS programming overrides the latch value from HW pin ? 9 selectable SMBUS addresse 文件：1.37237 Mbytes 頁數(shù)：35 Pages	SKYWORKS 思佳訊	SKYWORKS
SI53112-A00AGMR	文件：1.37237 Mbytes Page：35 Pages	DB1200ZL 12-OUTPUT PCIE GEN 3 BUFFER Features ? Twelve 0.7 V low-power, pushpull, HCSL-compatible PCIe Gen 3 outputs ? Individual OE HW pins for each output clock ? 100 MHz /133 MHz PLL operation, supports PCIe and QPI ? PLL bandwidth SW SMBUS programming overrides the latch value from HW pin ? 9 selectable SMBUS addresse 文件：1.37237 Mbytes 頁數(shù)：35 Pages	SKYWORKS 思佳訊	SKYWORKS
SI53112-A03A	文件：1.36942 Mbytes Page：34 Pages	DB1200ZL 12-OUTPUT PCIE GEN 3 BUFFER Features ? Twelve 0.7 V low-power, pushpull, HCSL-compatible PCIe Gen 3 outputs ? Individual OE HW pins for each output clock ? 100 MHz /133 MHz PLL operation, supports PCIe and QPI ? PLL bandwidth SW SMBUS programming overrides the latch value from HW pin ? 9 selectable SMBUS addresse 文件：1.36942 Mbytes 頁數(shù)：34 Pages	SKYWORKS 思佳訊	SKYWORKS
SI53112-A03AGM	文件：1.36942 Mbytes Page：34 Pages	DB1200ZL 12-OUTPUT PCIE GEN 3 BUFFER Features ? Twelve 0.7 V low-power, pushpull, HCSL-compatible PCIe Gen 3 outputs ? Individual OE HW pins for each output clock ? 100 MHz /133 MHz PLL operation, supports PCIe and QPI ? PLL bandwidth SW SMBUS programming overrides the latch value from HW pin ? 9 selectable SMBUS addresse 文件：1.36942 Mbytes 頁數(shù)：34 Pages	SKYWORKS 思佳訊	SKYWORKS
SI53112-A03AGMR	文件：1.36942 Mbytes Page：34 Pages	DB1200ZL 12-OUTPUT PCIE GEN 3 BUFFER Features ? Twelve 0.7 V low-power, pushpull, HCSL-compatible PCIe Gen 3 outputs ? Individual OE HW pins for each output clock ? 100 MHz /133 MHz PLL operation, supports PCIe and QPI ? PLL bandwidth SW SMBUS programming overrides the latch value from HW pin ? 9 selectable SMBUS addresse 文件：1.36942 Mbytes 頁數(shù)：34 Pages	SKYWORKS 思佳訊	SKYWORKS
SI53115	文件：1.93143 Mbytes Page：33 Pages	15-OUTPUT PCIE GEN3 BUFFER / ZERO-DELAY BUFFER Features ? Fifteen 0.7 V low-power, pushpull HCSL PCIe Gen3 outputs ? 100 MHz /133 MHz PLL operation, supports PCIe and QPI ? PLL bandwidth SW SMBUS programming overrides the latch value from HW pin ? 9 selectable SMBUS addresses ? SMBus address configurable to allow multiple buffers in 文件：1.93143 Mbytes 頁數(shù)：33 Pages	SKYWORKS 思佳訊	SKYWORKS

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技術(shù)參數(shù)

Jitter Recommended Range (fs)：
<
Temperature Range Min (°C)：
-40
Phase Jitter (ps RMS)：
0.3
Stability (+/- ppm)：
20; 31.5; 61.5
Package Type：
Multi; Multi
Control：
Pin
Period Jitter (RMS)：
2
Oscillator Type：
XO
Frequency Max：
1417
Package Size (mm)：
5x7
Description：
Single Freq Low Jitter XO
OE (active high)：
Pin 1
Number of Frequencies：
Single
Frequency Min：
10
Temperature Range Max (°C)：
85
Ouput Format(s)：
CML; CMOS; LVDS; LVPECL

供應(yīng)商	型號(hào)	品牌	批號(hào)	封裝	庫存	備注	價(jià)格
深圳市粵科源興科技有限公司	SI5315	KODENSHI	13+	DIP	21628	原裝分銷	詢價(jià)
千層芯半導(dǎo)體(深圳)有限公司	SI5310-EVB	SILICON	24+	原廠原裝	3000	原裝正品	詢價(jià)
深圳市卓越微芯電子有限公司	SI5312-H	AUK	25+	DIP	8250	百分百原裝正品真實(shí)公司現(xiàn)貨庫存本公司只做原裝可	詢價(jià)
深圳市一線半導(dǎo)體有限公司	SI5318-G-BC	Silicon	24+	BGA	762		詢價(jià)
深圳市恒創(chuàng)達(dá)實(shí)業(yè)有限公司	SI5319B-C-GMR	SILICONLA	17+	AA	6200	100%原裝正品現(xiàn)貨	詢價(jià)
深圳市鵬和科技有限公司	SI5319C-C-GM	SILICON	24+	QFN	5000	只做原裝公司現(xiàn)貨	詢價(jià)
深圳市海天鴻電子科技有限公司	SI53152-A01AGM	SiliconLabs	1651+	?	11520	只做原裝進(jìn)口,假一罰十	詢價(jià)
深圳市正邁科技有限公司	SI5317C-C-GM	SILICON	23+	NA	10658	專業(yè)電子元器件供應(yīng)鏈正邁科技特價(jià)代理特價(jià)，原裝元器件供應(yīng)，支持開發(fā)樣品	詢價(jià)
深圳市華來深電子有限公司	Si53159-A01AGM	原裝Silic	23+	QFN48	8560	受權(quán)代理!全新原裝現(xiàn)貨特價(jià)熱賣!	詢價(jià)
深圳市振宏微科技有限公司	SI5319B-C-GM	Silicon	23+	NA	10019	專做原裝正品,假一罰百!	詢價(jià)

更多SI531供應(yīng)商更新時(shí)間2026-1-22 9:01:00

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