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    首頁(yè) >SI53112>規(guī)格書(shū)列表

    型號(hào)下載 訂購(gòu)功能描述制造商 上傳企業(yè)LOGO

    SI53112

    DB1200ZL 12-OUTPUT PCIE GEN 3 BUFFER

    Features ? Twelve 0.7 V low-power, pushpull, HCSL-compatible PCIe Gen 3 outputs ? Individual OE HW pins for each output clock ? 100 MHz /133 MHz PLL operation, supports PCIe and QPI ? PLL bandwidth SW SMBUS programming overrides the latch value from HW pin ? 9 selectable SMBUS addresse

    文件:1.37237 Mbytes 頁(yè)數(shù):35 Pages

    SKYWORKS

    思佳訊

    SI53112

    DB1200ZL 12-OUTPUT PCIE GEN 3 BUFFER

    文件:1.46181 Mbytes 頁(yè)數(shù):35 Pages

    SILABS

    芯科科技

    Si53112

    PCIe Fanout/Zero-Delay Buffer

    The Si53112 is a 1 : 12 PCIe Fanout/Zero-Delay Buffer that meets all of the performance requirements of the Intel DB1900Z specification. The device is optimized for distributing 12? reference clocks for Intel? QuickPath Interconnect (Intel QPI), PCIe Gen 1/Gen 2/ Gen 3, SAS, SATA and Intel Scalable

    Skyworks

    思佳訊

    SI53112-A00AGM

    DB1200ZL 12-OUTPUT PCIE GEN 3 BUFFER

    Features ? Twelve 0.7 V low-power, pushpull, HCSL-compatible PCIe Gen 3 outputs ? Individual OE HW pins for each output clock ? 100 MHz /133 MHz PLL operation, supports PCIe and QPI ? PLL bandwidth SW SMBUS programming overrides the latch value from HW pin ? 9 selectable SMBUS addresse

    文件:1.37237 Mbytes 頁(yè)數(shù):35 Pages

    SKYWORKS

    思佳訊

    SI53112-A00AGMR

    DB1200ZL 12-OUTPUT PCIE GEN 3 BUFFER

    Features ? Twelve 0.7 V low-power, pushpull, HCSL-compatible PCIe Gen 3 outputs ? Individual OE HW pins for each output clock ? 100 MHz /133 MHz PLL operation, supports PCIe and QPI ? PLL bandwidth SW SMBUS programming overrides the latch value from HW pin ? 9 selectable SMBUS addresse

    文件:1.37237 Mbytes 頁(yè)數(shù):35 Pages

    SKYWORKS

    思佳訊

    SI53112-A03A

    DB1200ZL 12-OUTPUT PCIE GEN 3 BUFFER

    Features ? Twelve 0.7 V low-power, pushpull, HCSL-compatible PCIe Gen 3 outputs ? Individual OE HW pins for each output clock ? 100 MHz /133 MHz PLL operation, supports PCIe and QPI ? PLL bandwidth SW SMBUS programming overrides the latch value from HW pin ? 9 selectable SMBUS addresse

    文件:1.36942 Mbytes 頁(yè)數(shù):34 Pages

    SKYWORKS

    思佳訊

    SI53112-A03AGM

    DB1200ZL 12-OUTPUT PCIE GEN 3 BUFFER

    Features ? Twelve 0.7 V low-power, pushpull, HCSL-compatible PCIe Gen 3 outputs ? Individual OE HW pins for each output clock ? 100 MHz /133 MHz PLL operation, supports PCIe and QPI ? PLL bandwidth SW SMBUS programming overrides the latch value from HW pin ? 9 selectable SMBUS addresse

    文件:1.36942 Mbytes 頁(yè)數(shù):34 Pages

    SKYWORKS

    思佳訊

    SI53112-A03AGMR

    DB1200ZL 12-OUTPUT PCIE GEN 3 BUFFER

    Features ? Twelve 0.7 V low-power, pushpull, HCSL-compatible PCIe Gen 3 outputs ? Individual OE HW pins for each output clock ? 100 MHz /133 MHz PLL operation, supports PCIe and QPI ? PLL bandwidth SW SMBUS programming overrides the latch value from HW pin ? 9 selectable SMBUS addresse

    文件:1.36942 Mbytes 頁(yè)數(shù):34 Pages

    SKYWORKS

    思佳訊

    SI53112-A03A

    DB1200ZL 12-OUTPUT PCIE GEN 3 BUFFER

    文件:1.43783 Mbytes 頁(yè)數(shù):34 Pages

    SILABS

    芯科科技

    SI53112-A00AGMR

    Package:64-VFQFN 裸露焊盤(pán);包裝:卷帶(TR) 類(lèi)別:集成電路(IC) 應(yīng)用特定時(shí)鐘/定時(shí) 描述:IC BUFFER ZDB PCIE 1:12 64-QFN

    SKYWORKS

    思佳訊

    技術(shù)參數(shù)

    • Temperature Range Min (°C):

      -40

    • Package Type:

      QFN64

    • OPN:

      Si53112-A00AGM

    • Line Impedance Match:

      0

    • Universal Buffers:

      false

    • Number of Inputs:

      1

    • Number of Outputs:

      12

    • Frequency Max:

      133

    • Frequency Min (MHz):

      100

    • Package Size (mm):

      9x9

    • Description:

      PCle Fan-out/Zero-Delay Buffer

    • VDDO (V):

      3.3

    • Ouput Format(s):

      HCSL

    • Additive Jitter (ps RMS):

      0.08

    • VDD (V):

      3.3

    • PCIe Compliant:

      true

    • Feedback Path:

      false

    • Output Format Categories:

      Differential

    • Single Ended Input:

      false

    • LVCMOS Buffers:

      false

    • Differential Buffers:

      false

    • Temperature Range Max (°C):

      85

    • Dual:

      false

    • Zero Delay Buffers:

      true

    供應(yīng)商型號(hào)品牌批號(hào)封裝庫(kù)存備注價(jià)格
    SKYWORKS
    24+
    QFN
    32500
    SKYWORKS/SILICON lora物聯(lián)網(wǎng)芯片
    詢價(jià)
    Silicon Labs
    24+
    -
    53200
    一級(jí)代理/放心采購(gòu)
    詢價(jià)
    SILICON LABS(芯科)
    2447
    QFN-64(9x9)
    315000
    一級(jí)代理專(zhuān)營(yíng)品牌!原裝正品,優(yōu)勢(shì)現(xiàn)貨,長(zhǎng)期排單到貨
    詢價(jià)
    SILICON
    25+
    QFN-64
    3854
    就找我吧!--邀您體驗(yàn)愉快問(wèn)購(gòu)元件!
    詢價(jià)
    SILICON LABS(芯科)
    2021+
    QFN-64(9x9)
    499
    詢價(jià)
    SILICON LABS(芯科)
    23+
    NA
    20094
    正納10年以上分銷(xiāo)經(jīng)驗(yàn)原裝進(jìn)口正品做服務(wù)做口碑有支持
    詢價(jià)
    SILICON
    23+
    QFN
    50000
    全新原裝正品現(xiàn)貨,支持訂貨
    詢價(jià)
    Silicon
    25+
    QFN
    10000
    原裝現(xiàn)貨假一罰十
    詢價(jià)
    Silicon Labs
    22+
    64QFN
    9000
    原廠渠道,現(xiàn)貨配單
    詢價(jià)
    SILICON
    23+
    NA
    11200
    原廠授權(quán)一級(jí)代理、全球訂貨優(yōu)勢(shì)渠道、可提供一站式BO
    詢價(jià)
    更多SI53112供應(yīng)商 更新時(shí)間2026-1-22 18:38:00

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