Digital Video Encoder DENC2

GENERAL DESCRIPTION The SAA7185 encodes digital YUV video data to an NTSC, PAL CVBS or S-Video signal. The circuit accepts CCIR compatible YUV data with 720 active pixels per line in 4 : 2 : 2 multiplexed formats, for example MPEG decoded data. It includes a sync/clock generator and on-chip Digi

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Digital video scaler

GENERAL DESCRIPTION The CMOS circuit SAA7186 scales and filters digital video data to randomly sized picture windows. YUV input data in 4:2:2 format are required (SAA7191B source). FEATURES ? Scaling of video picture windows down to randomly sized windows ? Processes maximum 1023 pixels per li

文件：223.17 Kbytes 頁數(shù)：44 Pages

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Digital video encoder DENC2-SQ

GENERAL DESCRIPTION The SAA7187 encodes digital YUV video data to an NTSC, PAL CVBS or S-Video signal. The circuit accepts differently formatted YUV data with 640 or 768 active pixels per line. It includes a sync/clock generator and on-chip Digital-to-Analog Converters (DACs). FEATURES

文件：267.51 Kbytes 頁數(shù)：36 Pages

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Digital Video Encoder DENC2-M

GENERAL DESCRIPTION The SAA7188A encodes digital YUV video data to an NTSC, PAL CVBS or S-Video signal. FEATURES ? CMOS 5 V device ? Digital PAL/NTSC encoder ? System pixel frequency 13.5 MHz ? Accepts MPEG decoded data ? 8-bit wide MPEG port ? Input data format Cb, Y, Cr, etc. (CCIR 656)

文件：168.31 Kbytes 頁數(shù)：36 Pages

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Digital Video Encoder DENC2-M

GENERAL DESCRIPTION The SAA7188A encodes digital YUV video data to an NTSC, PAL CVBS or S-Video signal. FEATURES ? CMOS 5 V device ? Digital PAL/NTSC encoder ? System pixel frequency 13.5 MHz ? Accepts MPEG decoded data ? 8-bit wide MPEG port ? Input data format Cb, Y, Cr, etc. (CCIR 656)

文件：168.31 Kbytes 頁數(shù)：36 Pages

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Digital Video Encoder DENC2-M

GENERAL DESCRIPTION The SAA7188A encodes digital YUV video data to an NTSC, PAL CVBS or S-Video signal. FEATURES ? CMOS 5 V device ? Digital PAL/NTSC encoder ? System pixel frequency 13.5 MHz ? Accepts MPEG decoded data ? 8-bit wide MPEG port ? Input data format Cb, Y, Cr, etc. (CCIR 656)

文件：168.31 Kbytes 頁數(shù)：36 Pages

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Digital Multistandard Colour Decoder, Square Pixel DMSD-SQP

GENERAL DESCRIPTION The SAA7191B is a digital multistandard colour decoder suitable for 8-bit CVBS input signals or for 8-bit luminance and 8-bit chrominance input signals (Y/C). FEATURES ? Separate 8-bit luminance (Y or CVBS) and 8-bit chrominance inputs (CVBS or C) from CVBS, Y/C,

文件：199.62 Kbytes 頁數(shù)：40 Pages

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Digital video decoder, Scaler and Clock generator circuit DESCPro

GENERAL DESCRIPTION The CMOS circuit SAA7196, digital video decoder, scaler and clock generator (DESCPro), is a highly integrated circuit for DeskTop Video applications. It combines the functions of a digital multistandard decoder (SAA7191B), a digital video scaler (SAA7186) and a clock generator

文件：302.26 Kbytes 頁數(shù)：76 Pages

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Digital video decoder, Scaler and Clock generator circuit DESCPro

GENERAL DESCRIPTION The CMOS circuit SAA7196, digital video decoder, scaler and clock generator (DESCPro), is a highly integrated circuit for DeskTop Video applications. It combines the functions of a digital multistandard decoder (SAA7191B), a digital video scaler (SAA7186) and a clock generator

文件：302.26 Kbytes 頁數(shù)：76 Pages

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Clock Generator Circuit for desktop video systems CGC

GENERAL DESCRIPTION The SAA7197 generates all clock signals required for a digital TV system suitable for the SAA719x family. The circuit operates in either the phase-locked loop mode (PLL) or voltage controlled oscillator mode (VCO). FEATURES ? Suitable for Desktop Video systems ? Two differe

文件：107.16 Kbytes 頁數(shù)：16 Pages

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