| 型號 | 下載 訂購 | 功能描述 | 制造商 上傳企業(yè) | LOGO |
|---|---|---|---|---|
Cost-Effective, 2A Sink/Source Bus Termination Regulator General Description The RT9173C is a simple, cost-effective and high-speed linear regulator designed to generate termination voltage in double data rate (DDR) memory system to comply with the JEDEC SSTL_2 and SSTL_18 or other specific interfaces such as HSTL, SCSI-2 and SCSI-3 etc. devices requ 文件：225.03 Kbytes 頁數(shù)：13 Pages | RICHTEK 立锜科技 | RICHTEK | ||
Cost-Effective, 2A Sink/Source Bus Termination Regulator General Description The RT9173C is a simple, cost-effective and high-speed linear regulator designed to generate termination voltage in double data rate (DDR) memory system to comply with the JEDEC SSTL_2 and SSTL_18 or other specific interfaces such as HSTL, SCSI-2 and SCSI-3 etc. devices requ 文件：225.03 Kbytes 頁數(shù)：13 Pages | RICHTEK 立锜科技 | RICHTEK | ||
1.5A/3A Bus Termination Regulator General Description The RT9173/A regulator is designed to convert voltage supplies ranging from 1.6V to 6V into a desired output voltage which adjusted by two external voltage divider resistors. The regulator is capable of sourcing or sinking up to 3A of peak current while regulating an output 文件：198.64 Kbytes 頁數(shù)：10 Pages | RICHTEK 立锜科技 | RICHTEK | ||
Cost-Effective, Peak 3A Sink/Source Bus Termination Regulator General Description The RT9173D is a simple, cost-effective and high-speed linear regulator designed to generate termination voltage in double data rate (DDR) memory system to comply with the JEDEC SSTL_2 and SSTL_18 or other specific interfaces such as HSTL, SCSI-2 and SCSI-3 etc. devices requ 文件：223.6 Kbytes 頁數(shù)：13 Pages | RICHTEK 立锜科技 | RICHTEK | ||
Cost-Effective, Peak 3A Sink/Source Bus Termination Regulator General Description The RT9173D is a simple, cost-effective and high-speed linear regulator designed to generate termination voltage in double data rate (DDR) memory system to comply with the JEDEC SSTL_2 and SSTL_18 or other specific interfaces such as HSTL, SCSI-2 and SCSI-3 etc. devices requ 文件：223.6 Kbytes 頁數(shù)：13 Pages | RICHTEK 立锜科技 | RICHTEK | ||
Cost-Effective, Peak 3A Sink/Source Bus Termination Regulator General Description The RT9173D is a simple, cost-effective and high-speed linear regulator designed to generate termination voltage in double data rate (DDR) memory system to comply with the JEDEC SSTL_2 and SSTL_18 or other specific interfaces such as HSTL, SCSI-2 and SCSI-3 etc. devices requ 文件：223.6 Kbytes 頁數(shù)：13 Pages | RICHTEK 立锜科技 | RICHTEK | ||
Peak 3A Bus Termination Regulator 文件：306.32 Kbytes 頁數(shù)：13 Pages | RICHTEK 立锜科技 | RICHTEK | ||
Peak 3A Bus Termination Regulator 文件：306.32 Kbytes 頁數(shù)：13 Pages | RICHTEK 立锜科技 | RICHTEK | ||
Peak 3A Bus Termination Regulator 文件：306.32 Kbytes 頁數(shù)：13 Pages | RICHTEK 立锜科技 | RICHTEK | ||
Peak 3A Bus Termination Regulator 文件：306.32 Kbytes 頁數(shù)：13 Pages | RICHTEK 立锜科技 | RICHTEK |
技術(shù)參數(shù)
- Memory Supported：
DDRI;DDRII
- Vin(min)(V)：
1.5
- Vin(max)(V)：
2.5
- VTT Output Tolerance(max)(+/- mV)：
20
- Isource/Isink(max)(A)：
1.5
- Standby Current(typ)(mA)：
0.05
- Features：
Enable Input;OCP
- Package Type：
SOP-8;TO-252-5;TO-263-5
| 供應(yīng)商 | 型號 | 品牌 | 批號 | 封裝 | 庫存 | 備注 | 價格 |
|---|---|---|---|---|---|---|---|
RICHTEK/立锜 |
2025+ |
SOP8 |
5000 |
原裝進口,免費送樣品! |
詢價 | ||
24+ |
5000 |
公司存貨 |
詢價 | ||||
RICHTEK |
25+ |
SOP8 |
20 |
百分百原裝正品 真實公司現(xiàn)貨庫存 本公司只做原裝 可 |
詢價 | ||
RTCHTEK |
25+ |
SOP3.9-8 |
2987 |
只售原裝自家現(xiàn)貨!誠信經(jīng)營!歡迎來電! |
詢價 | ||
RICHTEK |
23+ |
SOP8 |
8650 |
受權(quán)代理!全新原裝現(xiàn)貨特價熱賣! |
詢價 | ||
RICHTEK/立锜 |
24+ |
30741 |
原裝正品現(xiàn)貨供應(yīng) |
詢價 | |||
RT |
20+ |
SOP8 |
2960 |
誠信交易大量庫存現(xiàn)貨 |
詢價 | ||
LINEAR/凌特 |
23+ |
SOP-8 |
69820 |
終端可以免費供樣,支持BOM配單! |
詢價 | ||
RT |
25+ |
SOP |
19 |
普通 |
詢價 | ||
立綺 |
2447 |
SOP-8 |
100500 |
一級代理專營品牌!原裝正品,優(yōu)勢現(xiàn)貨,長期排單到貨 |
詢價 |
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