18M-BIT DDR II SRAM SEPARATE I/O 2-WORD BURST OPERATION

文件：480.03 Kbytes 頁數(shù)：35 Pages

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18M-BIT DDR II SRAM SEPARATE I/O 2-WORD BURST OPERATION

Features ? 1.8 ± 0.1 V power supply ? 165-pin PLASTIC BGA (13 x 15) ? HSTL interface ? PLL circuitry for wide output data valid window and future frequency scaling ? Separate independent read and write data ports ? DDR read or write operation initiated each cycle ? Pipelined double data rat

文件：468.24 Kbytes 頁數(shù)：35 Pages

RENESAS

瑞薩

18M-BIT DDR II SRAM SEPARATE I/O 2-WORD BURST OPERATION

Features ? 1.8 ± 0.1 V power supply ? 165-pin PLASTIC BGA (13 x 15) ? HSTL interface ? PLL circuitry for wide output data valid window and future frequency scaling ? Separate independent read and write data ports ? DDR read or write operation initiated each cycle ? Pipelined double data rat

文件：468.24 Kbytes 頁數(shù)：35 Pages

RENESAS

瑞薩

18M-BIT DDR II SRAM SEPARATE I/O 2-WORD BURST OPERATION

文件：480.03 Kbytes 頁數(shù)：35 Pages

RENESAS

瑞薩