絲印：063A；Package：TSSOP8；Tiny Real-Time Clock/calendar with alarm function and I2C-bus

1 General description The PCF85063A is a CMOS1 Real-Time Clock (RTC) and calendar optimized for low power consumption. An offset register allows fine-tuning of the clock. All addresses and data are transferred serially via the two-line bidirectional I2C-bus. Maximum data rate is 400 kbit/s. The

文件：698.92 Kbytes 頁數(shù)：55 Pages

恩XP

Tiny Real-Time Clock/calendar with alarm function and I2C-bus

1 General description The PCF85063A is a CMOS1 Real-Time Clock (RTC) and calendar optimized for low power consumption. An offset register allows fine-tuning of the clock. All addresses and data are transferred serially via the two-line bidirectional I2C-bus. Maximum data rate is 400 kbit/s. The

文件：698.92 Kbytes 頁數(shù)：55 Pages

恩XP

Tiny Real-Time Clock/calendar with alarm function and I2C-bus

1 General description The PCF85063A is a CMOS1 Real-Time Clock (RTC) and calendar optimized for low power consumption. An offset register allows fine-tuning of the clock. All addresses and data are transferred serially via the two-line bidirectional I2C-bus. Maximum data rate is 400 kbit/s. The

文件：698.92 Kbytes 頁數(shù)：55 Pages

恩XP

Tiny Real-Time Clock/calendar with alarm function and I2C-bus

1 General description The PCF85063A is a CMOS1 Real-Time Clock (RTC) and calendar optimized for low power consumption. An offset register allows fine-tuning of the clock. All addresses and data are transferred serially via the two-line bidirectional I2C-bus. Maximum data rate is 400 kbit/s. The

文件：698.92 Kbytes 頁數(shù)：55 Pages

恩XP

Tiny Real-Time Clock/calendar with alarm function and I2C-bus

1 General description The PCF85063A is a CMOS1 Real-Time Clock (RTC) and calendar optimized for low power consumption. An offset register allows fine-tuning of the clock. All addresses and data are transferred serially via the two-line bidirectional I2C-bus. Maximum data rate is 400 kbit/s. The

文件：698.92 Kbytes 頁數(shù)：55 Pages

恩XP

Tiny Real-Time Clock/calendar

1. General description The PCF85063TP is a CMOS1 Real-Time Clock (RTC) and calendar optimized for low power consumption. An offset register allows fine-tuning of the clock. All addresses and data are transferred serially via the two-line bidirectional I2C-bus. Maximum bus speed is 400 kbit/s.

文件：408.51 Kbytes 頁數(shù)：52 Pages

恩XP

Tiny Real-Time Clock/calendar

1. General description The PCF85063TP is a CMOS1 Real-Time Clock (RTC) and calendar optimized for low power consumption. An offset register allows fine-tuning of the clock. All addresses and data are transferred serially via the two-line bidirectional I2C-bus. Maximum bus speed is 400 kbit/s.

文件：408.51 Kbytes 頁數(shù)：52 Pages

恩XP

絲?。?a target="_blank" title="Marking" href="/063/marking.html">063；Tiny Real-Time Clock/calendar

1. General description The PCF85063TP is a CMOS1 Real-Time Clock (RTC) and calendar optimized for low power consumption. An offset register allows fine-tuning of the clock. All addresses and data are transferred serially via the two-line bidirectional I2C-bus. Maximum bus speed is 400 kbit/s.

文件：408.51 Kbytes 頁數(shù)：52 Pages

恩XP

256 x 8-bit CMOS EEPROMs with I2C-bus interface

Description The PCF85102C-2 is a floating gate Electrically Erasable Programmable Read Only Memory (EEPROM) with 2 kbits (256 × 8-bit) non-volatile storage. By using an internal redundant storage code, it is fault tolerant to single bit errors. This feature dramatically increases the reliability

文件：99.29 Kbytes 頁數(shù)：20 Pages

PHI

PHI

256 x 8-bit CMOS EEPROMs with I2C-bus interface

Description The PCF85102C-2 is a floating gate Electrically Erasable Programmable Read Only Memory (EEPROM) with 2 kbits (256 × 8-bit) non-volatile storage. By using an internal redundant storage code, it is fault tolerant to single bit errors. This feature dramatically increases the reliability

文件：99.29 Kbytes 頁數(shù)：20 Pages

PHI

PHI