絲印：p80；Package：SOT765-1；Low-power dual D-type flip-flop; positive-edge trigger

1. General description The 74AUP2G80 provides the dual positive-edge triggered D-type flip-flop. Information on the data input is transferred to the Q output on the LOW-to-HIGH transition of the clock pulse. The input pin D must be stable one setup time prior to the LOW-to-HIGH clock transition

文件：279.64 Kbytes 頁數(shù)：19 Pages

NEXPERIA

安世

絲?。?strong>p80；Package：SOT833-1；Low-power dual D-type flip-flop; positive-edge trigger

1. General description The 74AUP2G80 provides the dual positive-edge triggered D-type flip-flop. Information on the data input is transferred to the Q output on the LOW-to-HIGH transition of the clock pulse. The input pin D must be stable one setup time prior to the LOW-to-HIGH clock transition

文件：279.64 Kbytes 頁數(shù)：19 Pages

NEXPERIA

安世

絲?。?a target="_blank" title="Marking" href="/p80c/marking.html">P80C；Package：SOD-323；Thyristor Surge Suppressors (TSS)

Features and Benefits Low voltage overshoot Low on-state voltage Does not degrade surge capability after multiple surge events within limit Fails short circuit when surged in excess of ratings Low Capacitance

文件：3.40002 Mbytes 頁數(shù)：6 Pages

UNSEMI

優(yōu)恩半導體

絲?。?a target="_blank" title="Marking" href="/p801/marking.html">P801；Package：SOT-5X3；TPLD801 Programmable Logic Device with 6-GPIO

1 Features ? Operating characteristics – Extended temperature range: -40°C to 125°C – Wide supply voltage range: 1.65V to 5.5V ? Configurable macro-cells – 2-, 3-, and 4-bit lookup tables – D-type flip-flops and latches with and without reset/set option – 8-bit pipe delay – Counters and d

文件：1.70805 Mbytes 頁數(shù)：51 Pages

TI

德州儀器

絲?。?a target="_blank" title="Marking" href="/p801q/marking.html">P801Q；Package：SOT-5X3；TPLD801-Q1 Automotive Programmable Logic Device with 6-GPIO

1 Features ? Operating characteristics – Extended temperature range: -40°C to 125°C – Wide supply voltage range: 1.65V to 5.5V – Qualified for automotive applications ? Configurable macro-cells – 2-, 3-, and 4-bit lookup tables – D-type flip-flops and latches with and without reset/set opt

文件：1.58016 Mbytes 頁數(shù)：46 Pages

TI

德州儀器

絲?。?a target="_blank" title="Marking" href="/p80nf03l/marking.html">P80NF03L；Package：TO-220；N-CHANNEL 30V - 0.004 - 80A TO-220 STripFET II MOSFET

DESCRIPTION This Power MOSFET is the latest development of STMicroelectronics unique “Single Feature Size?” stripbased process. The resulting transistor shows extremely high packing density for low on-resistance, rugged avalance characteristics and less critical alignment steps therefore a remark

文件：214.7 Kbytes 頁數(shù)：8 Pages

STMICROELECTRONICS

意法半導體

絲印：P80NF10FP；Package：TO-220FP；N-channel 100V - 0.012? - 38A - TO-220FP Low gate charge STripFET? II Power MOSFET

Description This Power MOSFET series realized with STMicroelectronics unique STripFET process has specifically been designed to minimize input capacitance and gate charge. It is therefore suitable as primary switch in advanced highefficiency isolated DC-DC converters for Telecom and Computer

文件：226.96 Kbytes 頁數(shù)：12 Pages

STMICROELECTRONICS

意法半導體

絲印：P80JC；Package：SMC；Surface Mount Rectifiers

文件：537.31 Kbytes 頁數(shù)：4 Pages

BILIN

銀河微電

絲?。?a target="_blank" title="Marking" href="/p80kc/marking.html">P80KC；Package：SMC；Surface Mount Rectifiers

文件：537.31 Kbytes 頁數(shù)：4 Pages

BILIN

銀河微電

絲?。?a target="_blank" title="Marking" href="/p804/marking.html">P804；Package：QFN-20L；3W/CH FILTERLESS STEREO CLASS-D AUDIO AMPLIFIER

文件：707.34 Kbytes 頁數(shù)：18 Pages

DIODES

美臺半導體