| 型號(hào) | 下載 訂購(gòu) | 功能描述 | 制造商 上傳企業(yè) | LOGO |
|---|---|---|---|---|
MT9041 | Multiple Output Trunk PLL Description The MT9041 is a digital phase-locked loop (PLL) designed to provide timing and synchronization signals for T1 and E1 primary rate transmission links that are compatible with ST-BUS/GCI frame alignment timing requirements. The PLL outputs can be synchronized to either a 2.048 MHz, 1. 文件:101.08 Kbytes 頁(yè)數(shù):14 Pages | MITEL | MITEL | |
MT9041 | T1/E1 System Synchronizer The MT9041B T1/E1 System Synchronizer contains a digital phase-locked loop (DPLL), which provides timing and synchronization signals for multitrunk T1 and E1 primary rate transmission links. The MT9041B generates ST-BUS clock and framing signals that are phase locked to either a 2.048 MHz, 1.544 MHz ? Supports AT&T TR62411 and Bellcore GR-1244-CORE Stratum 4 Enhanced and Stratum 4 timing for DS1 Interfaces\n? Supports ETSI ETS 300 011, TBR 4, TBR 12 and TBR 13 timing for E1 Interfaces\n? Selectable 1.544 MHz, 2.048 MHz or 8 kHz input reference signals\n? Provides C1.5, C2, C3, C4, C8 and C16 ou; | Microchip 微芯科技 | Microchip | |
Multiple Output Trunk PLL Description The MT9041 is a digital phase-locked loop (PLL) designed to provide timing and synchronization signals for T1 and E1 primary rate transmission links that are compatible with ST-BUS/GCI frame alignment timing requirements. The PLL outputs can be synchronized to either a 2.048 MHz, 1. 文件:101.08 Kbytes 頁(yè)數(shù):14 Pages | MITEL | MITEL | ||
T1/E1 System Synchronizer Description The MT9041B T1/E1 System Synchronizer contains a digital phase-locked loop (DPLL), which provides timing and synchronization signals for multitrunk T1 and E1 primary rate transmission links. The MT9041B generates ST-BUS clock and framing signals that are phase locked to either a 文件:72.85 Kbytes 頁(yè)數(shù):19 Pages | MITEL | MITEL | ||
T1/E1 System Synchronizer Description The MT9041B T1/E1 System Synchronizer contains a digital phase-locked loop (DPLL), which provides timing and synchronization signals for multitrunk T1 and E1 primary rate transmission links. The MT9041B generates ST-BUS clock and framing signals that are phase locked to either a 文件:72.85 Kbytes 頁(yè)數(shù):19 Pages | MITEL | MITEL | ||
T1/E1 System Synchronizer Description\nThe MT9041B T1/E1 System Synchronizer contains a digital phase-locked loop (DPLL), which provides timing and synchronization signals for multitrunk T1 and E1 primary rate transmission links.\nThe MT9041B generates ST-BUS clock and framing signals that are phase locked to either a 2.048M ? Supports AT&T TR62411 and Bellcore GR-1244-CORE Stratum 4 Enhanced and Stratum 4 timing for DS1 Interfaces\n? Supports ETSI ETS 300 011, TBR 4, TBR 12 and TBR 13 timing for E1 Interfaces\n? Selectable 1.544MHz, 2.048MHz or 8kHz input reference signals\n? Provides C1.5, C2, C3, C4, C8 and C16 outpu; | Mitel | Mitel | ||
T1/E1 System Synchronizer | Mitel | Mitel | ||
Package:28-LCC(J 形引線);包裝:托盤 功能:數(shù)字鎖相環(huán) 類別:集成電路(IC) 電信 描述:IC TELECOM INTERFACE 28PLCC | MICROCHIP 微芯科技 | MICROCHIP | ||
Package:28-LCC(J 形引線);包裝:卷帶(TR) 功能:數(shù)字鎖相環(huán) 類別:集成電路(IC) 電信 描述:IC TELECOM INTERFACE 28PLCC | MICROCHIP 微芯科技 | MICROCHIP |
技術(shù)參數(shù)
- DPLLs or Paths:
1
- DPLL Bandwidth (Hz):
1.9
- Inputs:
2
- Diff Outputs:
0
- CMOS Outputs:
6
- Low-Jitter Synthesizers:
0
- General Purpose Synthsizers:
0
- Typical Jitter (12kHz-20MHz) fs RMS:
Stratum 3
- Diff InputFreq Range:
1.544 MHz
- Output Freq Range:
16.384 MHz
- NV Memory:
N/A
- NCO ppb:
N/A
- Align:
3
- Packages:
Please call for package information
| 供應(yīng)商 | 型號(hào) | 品牌 | 批號(hào) | 封裝 | 庫(kù)存 | 備注 | 價(jià)格 |
|---|---|---|---|---|---|---|---|
24+ |
5000 |
公司存貨 |
詢價(jià) | ||||
MITEL |
24+ |
PLCC |
2866 |
原裝現(xiàn)貨假一罰十 |
詢價(jià) | ||
MITEL |
PLCC28 |
98+ |
6 |
全新原裝進(jìn)口自己庫(kù)存優(yōu)勢(shì) |
詢價(jià) | ||
MOTOROLA |
15+ |
PLCC28 |
11560 |
全新原裝,現(xiàn)貨庫(kù)存,長(zhǎng)期供應(yīng) |
詢價(jià) | ||
MITEL |
23+ |
PLCC28 |
2500 |
絕對(duì)全新原裝!現(xiàn)貨!特價(jià)!請(qǐng)放心訂購(gòu)! |
詢價(jià) | ||
MIT |
24+/25+ |
26 |
原裝正品現(xiàn)貨庫(kù)存價(jià)優(yōu) |
詢價(jià) | |||
ZARLINK |
25+ |
PLCC |
18000 |
原廠直接發(fā)貨進(jìn)口原裝 |
詢價(jià) | ||
ZARLINK |
25+ |
PLCC28 |
736 |
⊙⊙新加坡大量現(xiàn)貨庫(kù)存,深圳常備現(xiàn)貨!歡迎查詢!⊙ |
詢價(jià) | ||
ZARLINK |
16+ |
NA |
8800 |
原裝現(xiàn)貨,貨真價(jià)優(yōu) |
詢價(jià) | ||
MITEL |
17+ |
PLCC |
6200 |
100%原裝正品現(xiàn)貨 |
詢價(jià) |
相關(guān)規(guī)格書
更多- NE5532
- NE5532
- NE5532
- NE5532
- NE5532
- NE5532A
- NE5532A
- UNE5532
- SI7964DP
- SI7909DN
- SI7941DP
- SI7901EDN
- SI7940DP
- SI7956DP
- SI7980DP
- SI7902EDN
- SI7998DP
- SI7960DP
- SI7943DP
- SI7991DP
- SI7923DN
- SI7983DP
- SI7973DP
- SI7949DP
- SPC5605BF1MLQ6
- PI7C8150A
- PI7C8150DMAE
- XRCGB25M000F3N00R0
- WNS40H100CG
- TD62308
- TD62308APG
- TD62308AFG
- TL074
- TL074
- TL074
- TL074B
- TL074M
- SN65LVDT3486B
- PS9351L
- PS9317L2
- PS9313L2
- PS9309L2
- PS9308L2
- PS9306L2
- PS9305L
相關(guān)庫(kù)存
更多- NE5532
- NE5532
- NE5532
- NE5532
- NE5532A
- NE5532-TD
- NE5532NB
- NE5533
- SI7970DP
- SI7958DP
- SI7913DN
- SI7942DP
- SI7911DN
- SI7900EDN
- SI7922DN
- SI7946DP
- SI7945DP
- SI7921DN
- SI7905DN
- SI7938DP
- SI7925DN
- SI7948DP
- SI7946ADP
- SE1
- PI7C8150B
- PI7C8150DNDE
- PERICOMPI7C8150
- WNS40H100C
- WNS40H100CB
- TD62308BFG
- TD62308BP1G
- TD62308BF
- TL074
- TL074
- TL074A
- TL074-EP
- TL074H
- SN65LVDT3486AD
- PS9307L2
- PS9332L
- PS9313L
- PS9307AL
- PS9351L2
- PS9331L
- PS9303L

