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          首頁(yè) >MT8>規(guī)格書(shū)列表

          型號(hào)下載 訂購(gòu)功能描述制造商 上傳企業(yè)LOGO

          MT8940AE

          ISO-CMOS ST-BUS??FAMILY T1/CEPT Digital Trunk PLL

          Description The MT8940 is a dual digital phase-locked loop providing the timing and synchronization signals for the T1 or CEPT transmission links and the ST-BUS. The first PLL provides the T1 clock (1.544 MHz) synchronized to the input frame pulse at 8 kHz. The timing signals for the CEPT trans

          文件:299.61 Kbytes 頁(yè)數(shù):16 Pages

          MITEL

          MT8941

          Advanced T1/CEPT Digital Trunk PLL

          Description The MT8941B is a dual digital phase-locked loop providing the timing and synchronization signals for the T1 or CEPT transmission links and the ST-BUS. The first PLL provides the T1 clock (1.544 MHz) synchronized to the input frame pulse at 8 kHz. The timing signals for the CEPT tran

          文件:491.07 Kbytes 頁(yè)數(shù):27 Pages

          ZARLINK

          Zarlink Semiconductor Inc

          MT8941

          CMOS ST-BUS??FAMILY Advanced T1/CEPT Digital Trunk PLL

          Description The MT8941 is a dual digital phase-locked loop providing the timing and synchronization signals for the T1 or CEPT transmission links and the ST-BUS. The first PLL provides the T1 clock (1.544 MHz) synchronized to the input frame pulse at 8 kHz. The timing signals for the CEPT transmi

          文件:246.58 Kbytes 頁(yè)數(shù):18 Pages

          MITEL

          MT8941AE

          CMOS ST-BUS??FAMILY Advanced T1/CEPT Digital Trunk PLL

          Description The MT8941 is a dual digital phase-locked loop providing the timing and synchronization signals for the T1 or CEPT transmission links and the ST-BUS. The first PLL provides the T1 clock (1.544 MHz) synchronized to the input frame pulse at 8 kHz. The timing signals for the CEPT transmi

          文件:246.58 Kbytes 頁(yè)數(shù):18 Pages

          MITEL

          MT8941AP

          CMOS ST-BUS??FAMILY Advanced T1/CEPT Digital Trunk PLL

          Description The MT8941 is a dual digital phase-locked loop providing the timing and synchronization signals for the T1 or CEPT transmission links and the ST-BUS. The first PLL provides the T1 clock (1.544 MHz) synchronized to the input frame pulse at 8 kHz. The timing signals for the CEPT transmi

          文件:246.58 Kbytes 頁(yè)數(shù):18 Pages

          MITEL

          MT8941B

          CMOS ST-BUS??FAMILY Advanced T1/CEPT Digital Trunk PLL

          Description The MT8941B is a dual digital phase-locked loop providing the timing and synchronization signals for the T1 or CEPT transmission links and the ST-BUS. The first PLL provides the T1 clock (1.544 MHz) synchronized to the input frame pulse at 8 kHz. The timing signals for the CEPT tran

          文件:131.21 Kbytes 頁(yè)數(shù):22 Pages

          MITEL

          MT8941BE

          CMOS ST-BUS??FAMILY Advanced T1/CEPT Digital Trunk PLL

          Description The MT8941B is a dual digital phase-locked loop providing the timing and synchronization signals for the T1 or CEPT transmission links and the ST-BUS. The first PLL provides the T1 clock (1.544 MHz) synchronized to the input frame pulse at 8 kHz. The timing signals for the CEPT tran

          文件:131.21 Kbytes 頁(yè)數(shù):22 Pages

          MITEL

          MT8941BE

          Advanced T1/CEPT Digital Trunk PLL

          Description The MT8941B is a dual digital phase-locked loop providing the timing and synchronization signals for the T1 or CEPT transmission links and the ST-BUS. The first PLL provides the T1 clock (1.544 MHz) synchronized to the input frame pulse at 8 kHz. The timing signals for the CEPT tran

          文件:491.07 Kbytes 頁(yè)數(shù):27 Pages

          ZARLINK

          Zarlink Semiconductor Inc

          MT8941BP

          CMOS ST-BUS??FAMILY Advanced T1/CEPT Digital Trunk PLL

          Description The MT8941B is a dual digital phase-locked loop providing the timing and synchronization signals for the T1 or CEPT transmission links and the ST-BUS. The first PLL provides the T1 clock (1.544 MHz) synchronized to the input frame pulse at 8 kHz. The timing signals for the CEPT tran

          文件:131.21 Kbytes 頁(yè)數(shù):22 Pages

          MITEL

          MT8941BP

          Advanced T1/CEPT Digital Trunk PLL

          Description The MT8941B is a dual digital phase-locked loop providing the timing and synchronization signals for the T1 or CEPT transmission links and the ST-BUS. The first PLL provides the T1 clock (1.544 MHz) synchronized to the input frame pulse at 8 kHz. The timing signals for the CEPT tran

          文件:491.07 Kbytes 頁(yè)數(shù):27 Pages

          ZARLINK

          Zarlink Semiconductor Inc

          技術(shù)參數(shù)

          • FR2頻段范圍:

            24/28/39/40 G

          • 測(cè)量帶寬:

            200 MHz

          • 端口數(shù)量:

            4

          • 儀表操作系統(tǒng):

            Windows

          • 屏幕類型:

            無(wú)屏幕

          • 屏幕尺寸:

            無(wú)

          • 5G測(cè)量:

            001/011/031/032

          • 5G數(shù)據(jù)吞吐測(cè)試:

            012

          • 4G測(cè)量:

            無(wú)

          • 3G測(cè)量:

            無(wú)

          • 并行測(cè)試:

            無(wú)

          • 頻率擴(kuò)展至6 GHz (或 7.125 GHz):

            032(033)

          • 藍(lán)牙:

            無(wú)

          • 5G NR:

            MX800010A

          • 4G:

            無(wú)

          • WCDMA:

            無(wú)

          • 研發(fā)測(cè)試:

            推薦

          • 5G 數(shù)據(jù)吞吐測(cè)試:

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          更多MT8供應(yīng)商 更新時(shí)間2026-1-20 9:50:00
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