CMOS ST-BUS??FAMILY Advanced T1/CEPT Digital Trunk PLL

Description The MT8941 is a dual digital phase-locked loop providing the timing and synchronization signals for the T1 or CEPT transmission links and the ST-BUS. The first PLL provides the T1 clock (1.544 MHz) synchronized to the input frame pulse at 8 kHz. The timing signals for the CEPT transmi

文件：246.58 Kbytes 頁數(shù)：18 Pages

MITEL

CMOS ST-BUS??FAMILY Advanced T1/CEPT Digital Trunk PLL

Description The MT8941 is a dual digital phase-locked loop providing the timing and synchronization signals for the T1 or CEPT transmission links and the ST-BUS. The first PLL provides the T1 clock (1.544 MHz) synchronized to the input frame pulse at 8 kHz. The timing signals for the CEPT transmi

文件：246.58 Kbytes 頁數(shù)：18 Pages

MITEL

CMOS ST-BUS??FAMILY Advanced T1/CEPT Digital Trunk PLL

Description The MT8941B is a dual digital phase-locked loop providing the timing and synchronization signals for the T1 or CEPT transmission links and the ST-BUS. The first PLL provides the T1 clock (1.544 MHz) synchronized to the input frame pulse at 8 kHz. The timing signals for the CEPT tran

文件：131.21 Kbytes 頁數(shù)：22 Pages

MITEL

CMOS ST-BUS??FAMILY Advanced T1/CEPT Digital Trunk PLL

Description The MT8941B is a dual digital phase-locked loop providing the timing and synchronization signals for the T1 or CEPT transmission links and the ST-BUS. The first PLL provides the T1 clock (1.544 MHz) synchronized to the input frame pulse at 8 kHz. The timing signals for the CEPT tran

文件：131.21 Kbytes 頁數(shù)：22 Pages

MITEL