3.3V 1:10 LVCMOS PLL Clock Generator

3.3V 1:10 LVCMOS PLL Clock Generator The MPC9658 is a 3.3V compatible, 1:10 PLL based clock generator and zero-delay buffer targeted for high performance low-skew clock distribution in mid-range to high-performance telecom, networking and computing applications. With output frequencies up to 250

文件：292.3 Kbytes 頁數(shù)：12 Pages

MOTOROLA

摩托羅拉

3.3V 1:10 LVCMOS PLL Clock Generator

The MPC9658 is a 3.3 V compatible, 1:10 PLL based clock generator and zero-delay buffer targeted for high performance low-skew clock distribution in mid-range to high-performance telecom, networking and computing applications. With output frequencies up to 250 MHz and output skews less than 120

文件：681.74 Kbytes 頁數(shù)：13 Pages

RENESAS

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LVCMOS Clock Generator

The MPC9658 utilizes PLL technology to frequency lock its outputs onto an input reference clock. Normal operation of the MPC9658 requires the connection of the QFB output to the feedback input to close the PLL feedback path (external feedback). With the PLL locked, the output frequency is equal to t Low based low-voltage clock generator\nSupports zero-delay operation\n3.3 V power supply\nGenerates clock signals up to 250 MHz\nMaximum output skew of 120 ps\nDifferential LVPECL reference clock input\nExternal PLL feedback\nDrives up to 20 clock lines\n32-lead LQFP packaging\n32-lead Pb-free Packa;

Renesas

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3.3V 1:10 LVCMOS PLL Clock Generator

恩XP

時鐘發(fā)生器及支持產(chǎn)品 FSL 1-10 LVCMOS Zero Delay Buffer

Renesas

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Package：32-LQFP；包裝：卷帶（TR） 類別：集成電路（IC） 時鐘發(fā)生器，PLL，頻率合成器 描述：IC PLL CLK GEN 1:10 3.3V 32-LQFP

Renesas Electronics America Inc

Package：32-LQFP；包裝：卷帶（TR） 類別：集成電路（IC） 時鐘發(fā)生器，PLL，頻率合成器 描述：IC PLL CLK GEN 1:10 3.3V 32-LQFP

Renesas Electronics America Inc