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          首頁(yè) >MC14043B>規(guī)格書(shū)列表

          型號(hào)下載 訂購(gòu)功能描述制造商 上傳企業(yè)LOGO

          MC14043B

          CMOS MSI(Quad R-S Latches)

          The MC14043B and MC14044B quad R?S latches are constructed with MOS P?Channel and N?Channel enhancement mode devices in a single monolithic structure. Each latch has an independent Q output and set and reset inputs. The Q outputs are gated through three?state buffers having a common enable input.

          文件:192.37 Kbytes 頁(yè)數(shù):8 Pages

          ONSEMI

          安森美半導(dǎo)體

          MC14043B

          CMOS MSI Quad R?? Latches

          文件:104.25 Kbytes 頁(yè)數(shù):8 Pages

          ONSEMI

          安森美半導(dǎo)體

          MC14043B

          CMOS MSI Quad R?? Latches

          文件:143.25 Kbytes 頁(yè)數(shù):7 Pages

          ONSEMI

          安森美半導(dǎo)體

          MC14043B

          CMOS MSI Quad R?? Latches

          文件:118.43 Kbytes 頁(yè)數(shù):7 Pages

          ONSEMI

          安森美半導(dǎo)體

          MC14043BCP

          CMOS MSI(Quad R-S Latches)

          The MC14043B and MC14044B quad R?S latches are constructed with MOS P?Channel and N?Channel enhancement mode devices in a single monolithic structure. Each latch has an independent Q output and set and reset inputs. The Q outputs are gated through three?state buffers having a common enable input.

          文件:192.37 Kbytes 頁(yè)數(shù):8 Pages

          ONSEMI

          安森美半導(dǎo)體

          MC14043BD

          CMOS MSI(Quad R-S Latches)

          The MC14043B and MC14044B quad R?S latches are constructed with MOS P?Channel and N?Channel enhancement mode devices in a single monolithic structure. Each latch has an independent Q output and set and reset inputs. The Q outputs are gated through three?state buffers having a common enable input.

          文件:192.37 Kbytes 頁(yè)數(shù):8 Pages

          ONSEMI

          安森美半導(dǎo)體

          MC14043BDR2

          CMOS MSI(Quad R-S Latches)

          The MC14043B and MC14044B quad R?S latches are constructed with MOS P?Channel and N?Channel enhancement mode devices in a single monolithic structure. Each latch has an independent Q output and set and reset inputs. The Q outputs are gated through three?state buffers having a common enable input.

          文件:192.37 Kbytes 頁(yè)數(shù):8 Pages

          ONSEMI

          安森美半導(dǎo)體

          MC14043BF

          CMOS MSI(Quad R-S Latches)

          The MC14043B and MC14044B quad R?S latches are constructed with MOS P?Channel and N?Channel enhancement mode devices in a single monolithic structure. Each latch has an independent Q output and set and reset inputs. The Q outputs are gated through three?state buffers having a common enable input.

          文件:192.37 Kbytes 頁(yè)數(shù):8 Pages

          ONSEMI

          安森美半導(dǎo)體

          MC14043BFEL

          CMOS MSI(Quad R-S Latches)

          The MC14043B and MC14044B quad R?S latches are constructed with MOS P?Channel and N?Channel enhancement mode devices in a single monolithic structure. Each latch has an independent Q output and set and reset inputs. The Q outputs are gated through three?state buffers having a common enable input.

          文件:192.37 Kbytes 頁(yè)數(shù):8 Pages

          ONSEMI

          安森美半導(dǎo)體

          MC14043B_05

          CMOS MSI Quad R?? Latches

          文件:104.25 Kbytes 頁(yè)數(shù):8 Pages

          ONSEMI

          安森美半導(dǎo)體

          技術(shù)參數(shù)

          • Pb-free:

            Pb

          • AEC Qualified:

            A

          • Halide free:

            H

          • PPAP Capablee:

            P

          • Status:

            Active

          • Type:

            Latch

          • Channels:

            4

          • VCC Min (V):

            3

          • VCC Max (V):

            18

          • tpd Max (ns):

            175

          • IO Max (mA):

            2.25

          • Package Type:

            SOIC-16

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          更多MC14043B供應(yīng)商 更新時(shí)間2026-1-18 15:30:00
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