Package：28-SSOP（0.209"，5.30mm 寬）；包裝：卷帶（TR） 類別：集成電路（IC） 應(yīng)用特定時鐘/定時 描述：IC CLK BUF DDR 200MHZ 1CIRC

Renesas Electronics America Inc

Package：28-SSOP（0.209"，5.30mm 寬）；包裝：卷帶（TR） 類別：集成電路（IC） 應(yīng)用特定時鐘/定時 描述：IC CLK BUF DDR 200MHZ 1CIRC

Renesas Electronics America Inc

Low Cost DDR Phase Lock Loop Zero Delay Buffer

Product Description/Features: ? Low skew, low jitter PLL clock driver ? I2C for functional and output control ? Feedback pins for input to output synchronization ? Spread Spectrum tolerant inputs ? 3.3V tolerant CLK_INT input Switching Characteristics: ? PEAK - PEAK jitter (66MHz):

文件：54.59 Kbytes 頁數(shù)：6 Pages

ICST

Low Cost DDR Phase Lock Loop Zero Delay Buffer

Description Output Features DDR Zero Delay Clock Buffer ? Low skew, low jitter PLL clock driver ? I2C for functional and output control ? Feedback pins for input to output synchronization ? Spread Spectrum tolerant inputs ? 3.3V tolerant CLK_INT input Key Specifications ? PEAK - PEAK jitt

文件：240.76 Kbytes 頁數(shù)：8 Pages

RENESAS

瑞薩

Low Cost DDR Phase Lock Loop Zero Delay Buffer

Product Description/Features: ? Low skew, low jitter PLL clock driver ? I2C for functional and output control ? Feedback pins for input to output synchronization ? Spread Spectrum tolerant inputs ? 3.3V tolerant CLK_INT input Switching Characteristics: ? PEAK - PEAK jitter (66MHz):

文件：54.59 Kbytes 頁數(shù)：6 Pages

ICST