CHIP SCALE SERIES TERMINATION ARRAY

Product Description The CSPST is a high performance Integrated Passive Device (IPD) which provides series terminations suitable for use in high speed bus applications. Eight (8) or sixteen (16) series termination versions are provided. These resistors provide excellent high frequency performance

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CALMIRCO

CHIP SCALE SERIES TERMINATION ARRAY

Product Description The CSPST is a high performance Integrated Passive Device (IPD) which provides series terminations suitable for use in high speed bus applications. Eight (8) or sixteen (16) series termination versions are provided. These resistors provide excellent high frequency performance

文件：52.39 Kbytes 頁數(shù)：4 Pages

CALMIRCO

230V GU10 Single Spotlight - Brushed Chrome

DESCRIPTION 230V GU10 Single Spotlight - Brushed Chrome

文件：232.57 Kbytes 頁數(shù)：1 Pages

KNIGHTSBRIDGE

230V GU10 Single Spotlight - Matt Black

DESCRIPTION 230V GU10 Single Spotlight - Matt Black

文件：176.38 Kbytes 頁數(shù)：1 Pages

KNIGHTSBRIDGE

230V GU10 Single Spotlight - Matt White

DESCRIPTION 230V GU10 Single Spotlight - Matt White

文件：170.94 Kbytes 頁數(shù)：1 Pages

KNIGHTSBRIDGE

2.5V PHASE LOCKED LOOP CLOCK DRIVER

FEATURES: ? PLL clock driver for DDR (Double Data Rate) synchronous DRAM applications ? Spread spectrum clock compatible ? Operating frequency: 60MHz to 220MHz ? Low jitter (cycle-to-cycle): ±50ps ? Distributes one differential clock input to four differential clock outputs ? Enters low po

文件：265.46 Kbytes 頁數(shù)：11 Pages

RENESAS

瑞薩

2.5V - 2.6V PHASE LOCKED LOOP DIFFERENTIAL 1:10 SDRAM CLOCK DRIVER

DESCRIPTION: The CSPT857C is a PLL based clock driver that acts as a zero delay buffer to distribute one differential clock input pair(CLK, CLK ) to 10 differential output pairs (Y [0:9],Y [0:9]) and one differential pair of feedback clock output (FBOUT, FBOUT). External feedback pins (FBIN, F

文件：348.05 Kbytes 頁數(shù)：16 Pages

RENESAS

瑞薩

2.5V - 2.6V PHASE LOCKED LOOP DIFFERENTIAL 1:10 SDRAM CLOCK DRIVER

FEATURES: ? 1 to 10 differential clock distribution ? Optimized for clock distribution in DDR (Double Data Rate) SDRAM applications requiring improved output crosspoint voltage ? Operating frequency: 60MHz to 220MHz ? Very low skew: –

文件：347.57 Kbytes 頁數(shù)：16 Pages

RENESAS

瑞薩

1.8V PHASE LOCKED LOOP DIFFERENTIAL 1:10 SDRAM CLOCK DRIVER

FEATURES: ? 1 to 10 differential clock distribution ? Optimized for clock distribution in DDR2 (Double Data Rate) SDRAM applications ? Operating frequency: 125MHz to 340MHz ? Very low skew: ≤40ps ? Very low jitter: ≤40ps ? 1.8V AVDD and 1.8V VDDQ ? CMOS control signal input ? Test mode en

文件：306.33 Kbytes 頁數(shù)：14 Pages

RENESAS

瑞薩

1.8V PHASE LOCKED LOOP DIFFERENTIAL 1:10 SDRAM CLOCK DRIVER

FEATURES: ? 1 to 10 differential clock distribution ? Optimized for clock distribution in DDR2 (Double Data Rate) SDRAM applications ? Operating frequency: 125MHz to 340MHz ? Very low skew: ≤40ps ? Very low jitter: ≤40ps ? 1.8V AVDD and 1.8V VDDQ ? CMOS control signal input ? Test mode en

文件：298.54 Kbytes 頁數(shù)：14 Pages

RENESAS

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