3.3-V CLOCK PHASE-LOCKED LOOP CLOCK DRIVER

1FEATURES · Qualified for Automotive Applications · Phase-Locked Loop Clock Driver for Synchronous DRAM and General-Purpose Applications · Spread-Spectrum Clock Compatible · Operating Frequency: 24 MHz to 200 MHz · Low Jitter (Cycle-to-Cycle):

文件：469.89 Kbytes 頁數(shù)：15 Pages

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德州儀器

CDCVF2505 3.3-V Clock Phase-Lock Loop Clock Driver

1 Features 1? Phase-Lock Loop Clock Driver for Synchronous DRAM and General-Purpose Applications ? Spread Spectrum Clock Compatible ? Operating Frequency: 24 MHz to 200 MHz ? Low Jitter (Cycle-to-Cycle):

文件：862.54 Kbytes 頁數(shù)：25 Pages

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德州儀器

3.3-V CLOCK PHASE-LOCK LOOP CLOCK DRIVER

文件：549.51 Kbytes 頁數(shù)：14 Pages

TI

德州儀器

3.3-V CLOCK PHASE-LOCK LOOP CLOCK DRIVER

文件：207.51 Kbytes 頁數(shù)：10 Pages

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德州儀器

3.3-V CLOCK PHASE-LOCK LOOP CLOCK DRIVER

文件：369.62 Kbytes 頁數(shù)：14 Pages

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德州儀器

3.3-V Clock Phase-Lock Loop Clock Driver

文件：1.19077 Mbytes 頁數(shù)：23 Pages

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德州儀器

用于同步 DRAM和通用應(yīng)用且具有展頻功能、斷電模式的 PLL 時(shí)鐘驅(qū)動(dòng)器

The CDCVF2505 is a high-performance, low-skew, low-jitter, phase-lock loop (PLL) clock driver. This device uses a PLL to precisely align the output clocks (1Y[0-3] and CLKOUT) to the input clock signal (CLKIN) in both frequency and phase. The CDCVF2505 operates at 3.3 V and also provides integrated ? Phase-Lock Loop Clock Driver for Synchronous DRAM and General-Purpose Applications\n? Spread Spectrum Clock Compatible\n? Operating Frequency: 24 MHz to 200 MHz\n? Low Jitter (Cycle-to-Cycle):;

TI

德州儀器

絲?。?a target="_blank" title="Marking" href="/ckv05/marking.html">CKV05；Package：SOIC；CDCVF2505 3.3-V Clock Phase-Lock Loop Clock Driver

1 Features 1? Phase-Lock Loop Clock Driver for Synchronous DRAM and General-Purpose Applications ? Spread Spectrum Clock Compatible ? Operating Frequency: 24 MHz to 200 MHz ? Low Jitter (Cycle-to-Cycle):

文件：862.54 Kbytes 頁數(shù)：25 Pages

TI

德州儀器

絲?。?a target="_blank" title="Marking" href="/ckv05/marking.html">CKV05；Package：SOIC；CDCVF2505 3.3-V Clock Phase-Lock Loop Clock Driver

1 Features 1? Phase-Lock Loop Clock Driver for Synchronous DRAM and General-Purpose Applications ? Spread Spectrum Clock Compatible ? Operating Frequency: 24 MHz to 200 MHz ? Low Jitter (Cycle-to-Cycle):

文件：862.54 Kbytes 頁數(shù)：25 Pages

TI

德州儀器

絲?。?a target="_blank" title="Marking" href="/ckv05/marking.html">CKV05；Package：SOIC；CDCVF2505 3.3-V Clock Phase-Lock Loop Clock Driver

1 Features 1? Phase-Lock Loop Clock Driver for Synchronous DRAM and General-Purpose Applications ? Spread Spectrum Clock Compatible ? Operating Frequency: 24 MHz to 200 MHz ? Low Jitter (Cycle-to-Cycle):

文件：862.54 Kbytes 頁數(shù)：25 Pages

TI

德州儀器