CDCP1803中文資料具有可編程分頻器的 1:3 LVPECL 時鐘緩沖器數(shù)據(jù)手冊TI規(guī)格書

描述 Description

The CDCP1803 clock driver distributes one pair of differential clock inputs to three pairs of LVPECL differential clock outputs Y[2:0] and Y[2:0] with minimum skew for clock distribution. The CDCP1803 is specifically designed for driving 50-? transmission lines. The CDCP1803 has three control terminals, S0, S1, and S2, to select different output mode settings; see for details. The CDCP1803 is characterized for operation from –40°C to 85°C. For use in single-ended driver applications, the CDCP1803 also provides a VBB output terminal that can be directly connected to the unused input as a common-mode voltage reference.

特性 Features

? Distributes One Differential Clock Input to Three LVPECL Differential Clock Outputs
? Low-Output Skew 15 ps (Typical)
? Signaling Rate Up to 800-MHz LVPECL
? Provides VBB Bias Voltage Output for Single-Ended Input Signals
? 24-Terminal QFN Package (4 mm × 4 mm)
? Accepts Any Differential Signaling: LVDS, HSTL, CML, VML, SSTL-2, and Single-Ended: LVTTL/LVCMOS

簡介

CDCP1803屬于集成電路（IC）的時鐘緩沖器驅(qū)動器。由TI制造生產(chǎn)的CDCP1803時鐘緩沖器，驅(qū)動器時鐘緩沖器和驅(qū)動器集成電路產(chǎn)品族中的產(chǎn)品用于幫助信號在系統(tǒng)中傳輸，常用作頻率/時間參考信號，以同步系統(tǒng)內(nèi)的活動。盡管這些器件最常用到的功能就是緩沖（即，為使信號不受驅(qū)動負載的影響而從某個信號源復制信號），但是該產(chǎn)品族中的某些器件還能執(zhí)行其他功能，例如選擇性改變緩沖信號路徑、按某個整數(shù)值分割信號頻率，或進行所用電信號格式轉(zhuǎn)換。