絲印：CDC329A；Package：SOIC；1-LINE TO 6-LINE CLOCK DRIVER WITH SELECTABLE POLARITY

Low Output Skew for Clock-Distribution and Clock-Generation Applications TTL-Compatible Inputs and CMOS-Compatible Outputs Distributes One Clock Input to Six Clock Outputs Polarity Control Selects True or Complementary Outputs Distributed VCC and GND Pins Reduce Switching Noise High-Driv

文件：225.54 Kbytes 頁數(shù)：11 Pages

TI

德州儀器

1-LINE TO 6-LINE CLOCK DRIVER WITH SELECTABLE POLARITY

文件：89.85 Kbytes 頁數(shù)：6 Pages

TI

德州儀器

1-LINE TO 6-LINE CLOCK DRIVER WITH SELECTABLE POLARITY

文件：89.85 Kbytes 頁數(shù)：6 Pages

TI

德州儀器

Small Signal Transistor NPN- Silicon Darlington Transistor Chip

PROCESS DETAILS Process EPITAXIAL PLANAR Die Size 27 x 27 MILS Die Thickness 7.1 MILS Base Bonding Pad Area 4.2 x 4.2 MILS Emitter Bonding Pad Area 4.3 x 4.3 MILS Top Side Metalization Al - 30,000? Back Side Metalization Au - 13,000?

文件：42.74 Kbytes 頁數(shù)：1 Pages

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