CDC111中文資料3.3V LVPECL 差動時鐘驅動器數(shù)據(jù)手冊TI規(guī)格書

描述 Description

The differential LVPECL clock-driver circuit distributes one pair of differential LVPECL clock inputs (CLKIN, CLKIN\\) to nine pairs of differential clock (Y, Y\\) outputs with minimum skew for clock distribution. It is specifically designed for driving 50- transmission lines. When the output-enable (OE\\) is low, the nine differential outputs switch at the same frequency as the differential clock inputs. When OE\\ is high, the nine differential outputs are in static states (Y outputs are in the low state, Y\\ outputs are in the high state). The VREF output can be strapped to the CLKIN\\ input for a single-ended CLKIN input. The CDC111 is characterized for operation from 0°C to 70°C.

特性 Features

? Low-Output Skew for Clock-Distribution Applications
? Differential Low-Voltage Pseudo-ECL (LVPECL)-Compatible Inputs and Outputs
? Distributes Differential Clock Inputs to Nine Differential Clock Outputs
? Output Reference Voltage, VREF, Allows Distribution From a Single-Ended Clock Input
? Single-Ended LVPECL-Compatible Output Enable
? Packaged in Plastic Chip Carrier

簡介

CDC111屬于集成電路（IC）的時鐘緩沖器驅動器。由TI制造生產(chǎn)的CDC111時鐘緩沖器，驅動器時鐘緩沖器和驅動器集成電路產(chǎn)品族中的產(chǎn)品用于幫助信號在系統(tǒng)中傳輸，常用作頻率/時間參考信號，以同步系統(tǒng)內(nèi)的活動。盡管這些器件最常用到的功能就是緩沖（即，為使信號不受驅動負載的影響而從某個信號源復制信號），但是該產(chǎn)品族中的某些器件還能執(zhí)行其他功能，例如選擇性改變緩沖信號路徑、按某個整數(shù)值分割信號頻率，或進行所用電信號格式轉換。